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dma: mv_xor: Add support for DMA_INTERRUPT
The driver is capable of supporting DMA_INTERRUPT by issuing a dummy 128-byte transfer. This helps removing a poll in the async_tx stack, replacing it with a completion interrupt. Signed-off-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -538,6 +538,24 @@ mv_xor_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
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return mv_xor_prep_dma_xor(chan, dest, &src, 1, len, flags);
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}
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static struct dma_async_tx_descriptor *
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mv_xor_prep_dma_interrupt(struct dma_chan *chan, unsigned long flags)
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{
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struct mv_xor_chan *mv_chan = to_mv_xor_chan(chan);
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dma_addr_t src, dest;
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size_t len;
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src = mv_chan->dummy_src_addr;
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dest = mv_chan->dummy_dst_addr;
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len = MV_XOR_MIN_BYTE_COUNT;
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/*
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* We implement the DMA_INTERRUPT operation as a minimum sized
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* XOR operation with a single dummy source address.
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*/
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return mv_xor_prep_dma_xor(chan, dest, &src, 1, len, flags);
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}
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static void mv_xor_free_chan_resources(struct dma_chan *chan)
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{
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struct mv_xor_chan *mv_chan = to_mv_xor_chan(chan);
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@ -881,6 +899,10 @@ static int mv_xor_channel_remove(struct mv_xor_chan *mv_chan)
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dma_free_coherent(dev, MV_XOR_POOL_SIZE,
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mv_chan->dma_desc_pool_virt, mv_chan->dma_desc_pool);
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dma_unmap_single(dev, mv_chan->dummy_src_addr,
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MV_XOR_MIN_BYTE_COUNT, DMA_FROM_DEVICE);
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dma_unmap_single(dev, mv_chan->dummy_dst_addr,
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MV_XOR_MIN_BYTE_COUNT, DMA_TO_DEVICE);
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list_for_each_entry_safe(chan, _chan, &mv_chan->dmadev.channels,
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device_node) {
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@ -910,6 +932,16 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
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dma_dev = &mv_chan->dmadev;
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/*
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* These source and destination dummy buffers are used to implement
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* a DMA_INTERRUPT operation as a minimum-sized XOR operation.
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* Hence, we only need to map the buffers at initialization-time.
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*/
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mv_chan->dummy_src_addr = dma_map_single(dma_dev->dev,
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mv_chan->dummy_src, MV_XOR_MIN_BYTE_COUNT, DMA_FROM_DEVICE);
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mv_chan->dummy_dst_addr = dma_map_single(dma_dev->dev,
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mv_chan->dummy_dst, MV_XOR_MIN_BYTE_COUNT, DMA_TO_DEVICE);
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/* allocate coherent memory for hardware descriptors
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* note: writecombine gives slightly better performance, but
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* requires that we explicitly flush the writes
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@ -934,6 +966,8 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
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dma_dev->dev = &pdev->dev;
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/* set prep routines based on capability */
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if (dma_has_cap(DMA_INTERRUPT, dma_dev->cap_mask))
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dma_dev->device_prep_dma_interrupt = mv_xor_prep_dma_interrupt;
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if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask))
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dma_dev->device_prep_dma_memcpy = mv_xor_prep_dma_memcpy;
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if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
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@ -28,6 +28,9 @@
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#define MV_XOR_THRESHOLD 1
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#define MV_XOR_MAX_CHANNELS 2
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#define MV_XOR_MIN_BYTE_COUNT SZ_128
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#define MV_XOR_MAX_BYTE_COUNT (SZ_16M - 1)
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/* Values for the XOR_CONFIG register */
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#define XOR_OPERATION_MODE_XOR 0
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#define XOR_OPERATION_MODE_MEMCPY 2
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@ -116,6 +119,9 @@ struct mv_xor_chan {
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struct list_head all_slots;
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int slots_allocated;
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struct tasklet_struct irq_tasklet;
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char dummy_src[MV_XOR_MIN_BYTE_COUNT];
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char dummy_dst[MV_XOR_MIN_BYTE_COUNT];
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dma_addr_t dummy_src_addr, dummy_dst_addr;
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};
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/**
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@ -184,9 +190,4 @@ struct mv_xor_desc {
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#define mv_hw_desc_slot_idx(hw_desc, idx) \
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((void *)(((unsigned long)hw_desc) + ((idx) << 5)))
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#define MV_XOR_MIN_BYTE_COUNT (128)
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#define XOR_MAX_BYTE_COUNT ((16 * 1024 * 1024) - 1)
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#define MV_XOR_MAX_BYTE_COUNT XOR_MAX_BYTE_COUNT
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#endif
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