Renesas ARM Based SoC DT Updates for v4.4

* Add missing CPG/MSTP Clock Domain for sound on r8a779[01] SoCs
 * Tidy up SCI resource region on r8a779[018] SoCs
 * Add pinmux for iic0 on Lager board
 * Use CCF for audio clock on Lager and Koelsch boards
 * Use serial0 and 1 as serial ports on Marzen board
 * Use adxl345-specific compatible property for KZM9G board
 * Document compat string for Silk board
 * Enable GPIO, I2C, PCI, QSPI, USB PHY and HS, and VIN support on r8a7794/Silk
 * Add initial support for r8a7791/porter
 * Add common file for AA121TD01 panel
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWFHsPAAoJENfPZGlqN0++WBQQAKewTnv8GBqBtgT7WFz3ADLV
 CSDqME9lx70Hwfst8PWS0MLD4Fs/g/thf36LUbYSomZ35hzy4FGCXHvEOSwjZ9wq
 zEvwoIu9yWv3Ujc2EZ07YndXhqliyaNwRkC9foRHx3Nzasaa+2m4mDXIF6ENndlt
 9hJoWuE+iAAsTFAkcTp+0Bu97VNrtlcEjEA59KM5xGEBdCfN3mVt5+mHGcQh4yHF
 rBFkcqC7+8y5Igxk2VrcfMIlPv1cxWy/llCRQrvyV48CLf1HyIHYtfKx0Bj2JMFL
 pH841A6Sxi9Uhce0fjr4YCkBFpsGRtXjWOovyMKM+042PS7ugOUqf7GMskqIoLkN
 6hLzsNR2Da8p3OQrhXfv1dHbLkUMkyRkE6n2btAPnJWxAQwQBtTgLUXq561NnJuD
 to52gIKnmH9DeW3uaslZSE/GlgAeusQI9QwUIVnGq6m1AT9t3UKNaoohRo68pjQC
 P6YACrZLys0luPQkwGoZJdBH9clI4OBkcmw9t/6N7yg10aNnME9yjWaEbk/KsGVy
 yyiiqm2AKhXM6Qsho4DA7tSoxQRzX8Mee43vRRLlOIothzuVVdSGx/61uJtWLWFc
 52wNBdmSBWkaUTw237K7fXkIUtKXlhruCW1At3gBbBY2S53jOBrJ5+ZBFDf2hRpm
 GecycolgMWa+8/SID/jc
 =ceDx
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Merge "Renesas ARM Based SoC DT Updates for v4.4" from Simon Horman:

* Add missing CPG/MSTP Clock Domain for sound on r8a779[01] SoCs
* Tidy up SCI resource region on r8a779[018] SoCs
* Add pinmux for iic0 on Lager board
* Use CCF for audio clock on Lager and Koelsch boards
* Use serial0 and 1 as serial ports on Marzen board
* Use adxl345-specific compatible property for KZM9G board
* Document compat string for Silk board
* Enable GPIO, I2C, PCI, QSPI, USB PHY and HS, and VIN support on r8a7794/Silk
* Add initial support for r8a7791/porter
* Add common file for AA121TD01 panel

* tag 'renesas-dt-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (28 commits)
  ARM: shmobile: porter: add Ether DT support
  ARM: shmobile: fix SILK board name
  ARM: shmobile: r8a7794: add HS-USB DT support
  ARM: shmobile: dts: Add common file for AA121TD01 panel
  ARM: shmobile: r8a7794: link PCI USB devices to USB PHY
  ARM: shmobile: silk: enable USB PHY
  ARM: shmobile: r8a7794: add USB PHY DT support
  ARM: shmobile: porter: initial device tree
  ARM: shmobile: add Porter board DT bindings
  ARM: shmobile: silk: enable internal PCI
  ARM: shmobile: r8a7794: add internal PCI bridge nodes
  ARM: shmobile: r8a7790: lager: add pinmux for iic0
  ARM: shmobile: r8a7778: tidyup SSI resource region
  ARM: shmobile: r8a7791: tidyup SSI resource region
  ARM: shmobile: r8a7790: tidyup SSI resource region
  ARM: shmobile: lager: use CCF for audio clock
  ARM: shmobile: koelsch: use CCF for audio clock
  ARM: shmobile: silk: add VIN0/ADV7180 DT support
  ARM: shmobile: r8a7794: add VIN DT support
  ARM: shmobile: silk: add I2C1 DT support
  ...
This commit is contained in:
Arnd Bergmann 2015-10-08 17:20:25 +02:00
commit 21fadea995
13 changed files with 588 additions and 17 deletions

View File

@ -55,3 +55,7 @@ Boards:
compatible = "renesas,lager", "renesas,r8a7790"
- Marzen
compatible = "renesas,marzen", "renesas,r8a7779"
- Porter (M2-LCDP)
compatible = "renesas,porter", "renesas,r8a7791"
- SILK (RTP0RC7794LCB00011S)
compatible = "renesas,silk", "renesas,r8a7794"

View File

@ -532,6 +532,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
r8a7790-lager.dtb \
r8a7791-henninger.dtb \
r8a7791-koelsch.dtb \
r8a7791-porter.dtb \
r8a7793-gose.dtb \
r8a7794-alt.dtb \
r8a7794-silk.dtb \

View File

@ -239,7 +239,7 @@ rcar_sound: sound@ffd90000 {
#sound-dai-cells = <1>;
compatible = "renesas,rcar_sound-r8a7778", "renesas,rcar_sound-gen1";
reg = <0xffd90000 0x1000>, /* SRU */
<0xffd91000 0x1240>, /* SSI */
<0xffd91000 0x240>, /* SSI */
<0xfffe0000 0x24>; /* ADG */
clocks = <&mstp3_clks R8A7778_CLK_SSI8>,
<&mstp3_clks R8A7778_CLK_SSI7>,

View File

@ -19,12 +19,12 @@ / {
compatible = "renesas,marzen", "renesas,r8a7779";
aliases {
serial2 = &scif2;
serial4 = &scif4;
serial0 = &scif2;
serial1 = &scif4;
};
chosen {
bootargs = "console=ttySC2,115200 ignore_loglevel root=/dev/nfs ip=on";
bootargs = "ignore_loglevel root=/dev/nfs ip=on";
stdout-path = &scif2;
};

View File

@ -174,6 +174,13 @@ vccq_sdhi2: regulator@4 {
1800000 0>;
};
audio_clock: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <11289600>;
clock-output-names = "audio_clock";
};
rsnd_ak4643: sound {
compatible = "simple-audio-card";
@ -187,7 +194,7 @@ sndcpu: simple-audio-card,cpu {
sndcodec: simple-audio-card,codec {
sound-dai = <&ak4643>;
system-clock-frequency = <11289600>;
clocks = <&audio_clock>;
};
};
@ -335,6 +342,11 @@ msiof1_pins: spi2 {
renesas,function = "msiof1";
};
iic0_pins: iic0 {
renesas,groups = "iic0";
renesas,function = "iic0";
};
iic1_pins: iic1 {
renesas,groups = "iic1";
renesas,function = "iic1";
@ -510,6 +522,8 @@ &cpu0 {
&iic0 {
status = "okay";
pinctrl-0 = <&iic0_pins>;
pinctrl-names = "default";
};
&iic1 {

View File

@ -1599,7 +1599,7 @@ rcar_sound: sound@ec500000 {
reg = <0 0xec500000 0 0x1000>, /* SCU */
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x1280>, /* SSI */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";

View File

@ -242,6 +242,13 @@ vccq_sdhi2: regulator@5 {
1800000 0>;
};
audio_clock: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <11289600>;
clock-output-names = "audio_clock";
};
rsnd_ak4643: sound {
compatible = "simple-audio-card";
@ -255,7 +262,7 @@ sndcpu: simple-audio-card,cpu {
sndcodec: simple-audio-card,codec {
sound-dai = <&ak4643>;
system-clock-frequency = <11289600>;
clocks = <&audio_clock>;
};
};

View File

@ -0,0 +1,80 @@
/*
* Device Tree Source for the Porter board
*
* Copyright (C) 2015 Cogent Embedded, Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
#include "r8a7791.dtsi"
/ {
model = "Porter";
compatible = "renesas,porter", "renesas,r8a7791";
aliases {
serial0 = &scif0;
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = &scif0;
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x40000000>;
};
memory@200000000 {
device_type = "memory";
reg = <2 0x00000000 0 0x40000000>;
};
};
&extal_clk {
clock-frequency = <20000000>;
};
&pfc {
scif0_pins: serial0 {
renesas,groups = "scif0_data_d";
renesas,function = "scif0";
};
ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth";
};
phy1_pins: phy1 {
renesas,groups = "intc_irq0";
renesas,function = "intc";
};
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
status = "okay";
};
&ether {
pinctrl-0 = <&ether_pins &phy1_pins>;
pinctrl-names = "default";
phy-handle = <&phy1>;
renesas,ether-link-active-low;
status = "ok";
phy1: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
micrel,led-mode = <1>;
};
};

View File

@ -1649,7 +1649,7 @@ rcar_sound: sound@ec500000 {
reg = <0 0xec500000 0 0x1000>, /* SCU */
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x1280>, /* SSI */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";

View File

@ -61,10 +61,35 @@ phy1_pins: phy1 {
renesas,function = "intc";
};
i2c1_pins: i2c1 {
renesas,groups = "i2c1";
renesas,function = "i2c1";
};
mmcif0_pins: mmcif0 {
renesas,groups = "mmc_data8", "mmc_ctrl";
renesas,function = "mmc";
};
qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
vin0_pins: vin0 {
renesas,groups = "vin0_data8", "vin0_clk";
renesas,function = "vin0";
};
usb0_pins: usb0 {
renesas,groups = "usb0";
renesas,function = "usb0";
};
usb1_pins: usb1 {
renesas,groups = "usb1";
renesas,function = "usb1";
};
};
&scif2 {
@ -90,6 +115,27 @@ phy1: ethernet-phy@1 {
};
};
&i2c1 {
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <400000>;
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
remote = <&vin0>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin0ep>;
};
};
};
};
&mmcif0 {
pinctrl-0 = <&mmcif0_pins>;
pinctrl-names = "default";
@ -100,3 +146,71 @@ &mmcif0 {
non-removable;
status = "okay";
};
&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spansion,s25fl512s", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <30000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-cpol;
spi-cpha;
m25p,fast-read;
partition@0 {
label = "loader";
reg = <0x00000000 0x00040000>;
read-only;
};
partition@40000 {
label = "user";
reg = <0x00040000 0x00400000>;
read-only;
};
partition@440000 {
label = "flash";
reg = <0x00440000 0x03bc0000>;
};
};
};
/* composite video input */
&vin0 {
status = "okay";
pinctrl-0 = <&vin0_pins>;
pinctrl-names = "default";
port {
#address-cells = <1>;
#size-cells = <0>;
vin0ep: endpoint {
remote-endpoint = <&adv7180>;
bus-width = <8>;
};
};
};
&pci0 {
status = "okay";
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";
};
&pci1 {
status = "okay";
pinctrl-0 = <&usb1_pins>;
pinctrl-names = "default";
};
&usbphy {
status = "okay";
};

View File

@ -19,6 +19,18 @@ / {
#address-cells = <2>;
#size-cells = <2>;
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
spi0 = &qspi;
vin0 = &vin0;
vin1 = &vin1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
@ -50,6 +62,97 @@ gic: interrupt-controller@f1001000 {
interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
};
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
reg = <0 0xe6050000 0 0x50>;
interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 0 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO0>;
power-domains = <&cpg_clocks>;
};
gpio1: gpio@e6051000 {
compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
reg = <0 0xe6051000 0 0x50>;
interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 32 26>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO1>;
power-domains = <&cpg_clocks>;
};
gpio2: gpio@e6052000 {
compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
reg = <0 0xe6052000 0 0x50>;
interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 64 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO2>;
power-domains = <&cpg_clocks>;
};
gpio3: gpio@e6053000 {
compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
reg = <0 0xe6053000 0 0x50>;
interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 96 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO3>;
power-domains = <&cpg_clocks>;
};
gpio4: gpio@e6054000 {
compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
reg = <0 0xe6054000 0 0x50>;
interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 128 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO4>;
power-domains = <&cpg_clocks>;
};
gpio5: gpio@e6055000 {
compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
reg = <0 0xe6055000 0 0x50>;
interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 160 28>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO5>;
power-domains = <&cpg_clocks>;
};
gpio6: gpio@e6055400 {
compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
reg = <0 0xe6055400 0 0x50>;
interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 192 26>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO6>;
power-domains = <&cpg_clocks>;
};
cmt0: timer@ffca0000 {
compatible = "renesas,cmt-48-gen2";
reg = <0 0xffca0000 0 0x1004>;
@ -407,6 +510,73 @@ ether: ethernet@ee700000 {
status = "disabled";
};
/* The memory map in the User's Manual maps the cores to bus numbers */
i2c0: i2c@e6508000 {
compatible = "renesas,i2c-r8a7794";
reg = <0 0xe6508000 0 0x40>;
interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C0>;
power-domains = <&cpg_clocks>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@e6518000 {
compatible = "renesas,i2c-r8a7794";
reg = <0 0xe6518000 0 0x40>;
interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C1>;
power-domains = <&cpg_clocks>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@e6530000 {
compatible = "renesas,i2c-r8a7794";
reg = <0 0xe6530000 0 0x40>;
interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C2>;
power-domains = <&cpg_clocks>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c3: i2c@e6540000 {
compatible = "renesas,i2c-r8a7794";
reg = <0 0xe6540000 0 0x40>;
interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C3>;
power-domains = <&cpg_clocks>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c4: i2c@e6520000 {
compatible = "renesas,i2c-r8a7794";
reg = <0 0xe6520000 0 0x40>;
interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C4>;
power-domains = <&cpg_clocks>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c5: i2c@e6528000 {
compatible = "renesas,i2c-r8a7794";
reg = <0 0xe6528000 0 0x40>;
interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C5>;
power-domains = <&cpg_clocks>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
mmcif0: mmc@ee200000 {
compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
@ -446,6 +616,140 @@ sdhi2: sd@ee160000 {
status = "disabled";
};
qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7794", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_QSPI_MOD>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>;
dma-names = "tx", "rx";
power-domains = <&cpg_clocks>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
vin0: video@e6ef0000 {
compatible = "renesas,vin-r8a7794";
reg = <0 0xe6ef0000 0 0x1000>;
interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp8_clks R8A7794_CLK_VIN0>;
power-domains = <&cpg_clocks>;
status = "disabled";
};
vin1: video@e6ef1000 {
compatible = "renesas,vin-r8a7794";
reg = <0 0xe6ef1000 0 0x1000>;
interrupts = <0 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp8_clks R8A7794_CLK_VIN1>;
power-domains = <&cpg_clocks>;
status = "disabled";
};
pci0: pci@ee090000 {
compatible = "renesas,pci-r8a7794";
device_type = "pci";
reg = <0 0xee090000 0 0xc00>,
<0 0xee080000 0 0x1100>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp7_clks R8A7794_CLK_EHCI>;
power-domains = <&cpg_clocks>;
status = "disabled";
bus-range = <0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
usb@0,1 {
reg = <0x800 0 0 0 0>;
device_type = "pci";
phys = <&usb0 0>;
phy-names = "usb";
};
usb@0,2 {
reg = <0x1000 0 0 0 0>;
device_type = "pci";
phys = <&usb0 0>;
phy-names = "usb";
};
};
pci1: pci@ee0d0000 {
compatible = "renesas,pci-r8a7794";
device_type = "pci";
reg = <0 0xee0d0000 0 0xc00>,
<0 0xee0c0000 0 0x1100>;
interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp7_clks R8A7794_CLK_EHCI>;
power-domains = <&cpg_clocks>;
status = "disabled";
bus-range = <1 1>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
usb@0,1 {
reg = <0x800 0 0 0 0>;
device_type = "pci";
phys = <&usb2 0>;
phy-names = "usb";
};
usb@0,2 {
reg = <0x1000 0 0 0 0>;
device_type = "pci";
phys = <&usb2 0>;
phy-names = "usb";
};
};
hsusb: usb@e6590000 {
compatible = "renesas,usbhs-r8a7794";
reg = <0 0xe6590000 0 0x100>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp7_clks R8A7794_CLK_HSUSB>;
power-domains = <&cpg_clocks>;
renesas,buswait = <4>;
phys = <&usb0 1>;
phy-names = "usb";
status = "disabled";
};
usbphy: usb-phy@e6590100 {
compatible = "renesas,usb-phy-r8a7794";
reg = <0 0xe6590100 0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mstp7_clks R8A7794_CLK_HSUSB>;
clock-names = "usbhs";
power-domains = <&cpg_clocks>;
status = "disabled";
usb0: usb-channel@0 {
reg = <0>;
#phy-cells = <1>;
};
usb2: usb-channel@2 {
reg = <2>;
#phy-cells = <1>;
};
};
clocks {
#address-cells = <2>;
#size-cells = <2>;
@ -749,16 +1053,22 @@ R8A7794_CLK_VIN1 R8A7794_CLK_VIN0 R8A7794_CLK_ETHER
mstp9_clks: mstp9_clks@e6150994 {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
clocks = <&cpg_clocks R8A7794_CLK_QSPI>, <&hp_clk>, <&hp_clk>,
<&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
<&cp_clk>, <&cp_clk>, <&cp_clk>,
<&cpg_clocks R8A7794_CLK_QSPI>, <&hp_clk>, <&hp_clk>,
<&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
#clock-cells = <1>;
clock-indices = <
R8A7794_CLK_QSPI_MOD R8A7794_CLK_I2C5 R8A7794_CLK_I2C4
R8A7794_CLK_I2C3 R8A7794_CLK_I2C2 R8A7794_CLK_I2C1
R8A7794_CLK_I2C0
>;
clock-indices = <R8A7794_CLK_GPIO6 R8A7794_CLK_GPIO5
R8A7794_CLK_GPIO4 R8A7794_CLK_GPIO3
R8A7794_CLK_GPIO2 R8A7794_CLK_GPIO1
R8A7794_CLK_GPIO0 R8A7794_CLK_QSPI_MOD
R8A7794_CLK_I2C5 R8A7794_CLK_I2C4
R8A7794_CLK_I2C3 R8A7794_CLK_I2C2
R8A7794_CLK_I2C1 R8A7794_CLK_I2C0>;
clock-output-names =
"qspi_mod", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0";
"gpio6", "gpio5", "gpio4", "gpio3", "gpio2",
"gpio1", "gpio0", "qspi_mod",
"i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0";
};
mstp11_clks: mstp11_clks@e615099c {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";

View File

@ -0,0 +1,41 @@
/*
* Common file for the AA121TD01 panel connected to Renesas R-Car boards
*
* Copyright (C) 2015 Renesas Electronics Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/ {
panel {
compatible = "mitsubishi,aa121td01", "panel-dpi";
width-mm = <261>;
height-mm = <163>;
panel-timing {
/* 1280x800 @60Hz */
clock-frequency = <71000000>;
hactive = <1280>;
vactive = <800>;
hsync-len = <70>;
hfront-porch = <20>;
hback-porch = <70>;
vsync-len = <5>;
vfront-porch = <3>;
vback-porch = <15>;
};
port {
panel_in: endpoint {
remote-endpoint = <&lvds_connector>;
};
};
};
};
&lvds_connector {
remote-endpoint = <&panel_in>;
};

View File

@ -206,7 +206,7 @@ ak4648: codec@12 {
};
accelerometer@1d {
compatible = "adi,adxl34x";
compatible = "adi,adxl345";
reg = <0x1d>;
interrupt-parent = <&irqpin3>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>,