arm64: dts: marvell: cp110: add GPIO interrupts

Add the GPIO interrupts for the CP110.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit is contained in:
Russell King 2017-07-08 20:16:34 +01:00 committed by Gregory CLEMENT
parent 48907d0ccb
commit 2188b396d5
2 changed files with 20 additions and 2 deletions

View File

@ -131,8 +131,12 @@ cpm_gpio1: gpio@100 {
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&cpm_pinctrl 0 0 32>;
interrupt-controller;
interrupts = <ICU_GRP_NSR 86 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 85 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 84 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 83 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
cpm_gpio2: gpio@140 {
@ -142,6 +146,11 @@ cpm_gpio2: gpio@140 {
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&cpm_pinctrl 0 32 31>;
interrupt-controller;
interrupts = <ICU_GRP_NSR 82 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 81 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 80 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 79 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};

View File

@ -138,8 +138,12 @@ cps_gpio1: gpio@100 {
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&cps_pinctrl 0 0 32>;
interrupt-controller;
interrupts = <ICU_GRP_NSR 86 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 85 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 84 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 83 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
cps_gpio2: gpio@140 {
@ -149,6 +153,11 @@ cps_gpio2: gpio@140 {
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&cps_pinctrl 0 32 31>;
interrupt-controller;
interrupts = <ICU_GRP_NSR 82 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 81 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 80 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 79 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};