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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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habanalabs: add debugfs support for MMU with 6 HOPs
This commit modify the existing debugfs code to support future devices that have a 6 HOPs MMU implementation instead of 5 HOPs implementation. Signed-off-by: Moti Haimovski <mhaimovski@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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@ -354,6 +354,14 @@ static inline u64 get_hop4_pte_addr(struct hl_ctx *ctx,
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mmu_specs->hop4_shift);
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}
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static inline u64 get_hop5_pte_addr(struct hl_ctx *ctx,
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struct hl_mmu_properties *mmu_specs,
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u64 hop_addr, u64 vaddr)
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{
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return get_hopN_pte_addr(ctx, hop_addr, vaddr, mmu_specs->hop5_mask,
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mmu_specs->hop5_shift);
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}
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static inline u64 get_next_hop_addr(u64 curr_pte)
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{
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if (curr_pte & PAGE_PRESENT_MASK)
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@ -377,6 +385,7 @@ static int mmu_show(struct seq_file *s, void *data)
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hop2_addr = 0, hop2_pte_addr = 0, hop2_pte = 0,
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hop3_addr = 0, hop3_pte_addr = 0, hop3_pte = 0,
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hop4_addr = 0, hop4_pte_addr = 0, hop4_pte = 0,
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hop5_addr = 0, hop5_pte_addr = 0, hop5_pte = 0,
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virt_addr = dev_entry->mmu_addr;
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if (!hdev->mmu_enable)
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@ -428,20 +437,49 @@ static int mmu_show(struct seq_file *s, void *data)
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hop3_pte_addr = get_hop3_pte_addr(ctx, mmu_prop, hop3_addr, virt_addr);
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hop3_pte = hdev->asic_funcs->read_pte(hdev, hop3_pte_addr);
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if (!(hop3_pte & LAST_MASK)) {
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if (mmu_prop->num_hops == MMU_ARCH_5_HOPS) {
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if (!(hop3_pte & LAST_MASK)) {
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hop4_addr = get_next_hop_addr(hop3_pte);
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if (hop4_addr == ULLONG_MAX)
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goto not_mapped;
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hop4_pte_addr = get_hop4_pte_addr(ctx, mmu_prop,
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hop4_addr, virt_addr);
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hop4_pte = hdev->asic_funcs->read_pte(hdev,
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hop4_pte_addr);
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if (!(hop4_pte & PAGE_PRESENT_MASK))
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goto not_mapped;
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} else {
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if (!(hop3_pte & PAGE_PRESENT_MASK))
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goto not_mapped;
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}
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} else {
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hop4_addr = get_next_hop_addr(hop3_pte);
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if (hop4_addr == ULLONG_MAX)
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goto not_mapped;
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hop4_pte_addr = get_hop4_pte_addr(ctx, mmu_prop, hop4_addr,
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virt_addr);
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hop4_pte = hdev->asic_funcs->read_pte(hdev, hop4_pte_addr);
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if (!(hop4_pte & PAGE_PRESENT_MASK))
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goto not_mapped;
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} else {
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if (!(hop3_pte & PAGE_PRESENT_MASK))
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goto not_mapped;
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hop4_pte_addr = get_hop4_pte_addr(ctx, mmu_prop,
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hop4_addr, virt_addr);
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hop4_pte = hdev->asic_funcs->read_pte(hdev,
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hop4_pte_addr);
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if (!(hop4_pte & LAST_MASK)) {
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hop5_addr = get_next_hop_addr(hop4_pte);
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if (hop5_addr == ULLONG_MAX)
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goto not_mapped;
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hop5_pte_addr = get_hop5_pte_addr(ctx, mmu_prop,
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hop5_addr, virt_addr);
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hop5_pte = hdev->asic_funcs->read_pte(hdev,
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hop5_pte_addr);
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if (!(hop5_pte & PAGE_PRESENT_MASK))
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goto not_mapped;
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} else {
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if (!(hop4_pte & PAGE_PRESENT_MASK))
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goto not_mapped;
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}
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}
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seq_printf(s, "asid: %u, virt_addr: 0x%llx\n",
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@ -463,10 +501,22 @@ static int mmu_show(struct seq_file *s, void *data)
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seq_printf(s, "hop3_pte_addr: 0x%llx\n", hop3_pte_addr);
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seq_printf(s, "hop3_pte: 0x%llx\n", hop3_pte);
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if (!(hop3_pte & LAST_MASK)) {
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if (mmu_prop->num_hops == MMU_ARCH_5_HOPS) {
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if (!(hop3_pte & LAST_MASK)) {
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seq_printf(s, "hop4_addr: 0x%llx\n", hop4_addr);
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seq_printf(s, "hop4_pte_addr: 0x%llx\n", hop4_pte_addr);
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seq_printf(s, "hop4_pte: 0x%llx\n", hop4_pte);
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}
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} else {
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seq_printf(s, "hop4_addr: 0x%llx\n", hop4_addr);
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seq_printf(s, "hop4_pte_addr: 0x%llx\n", hop4_pte_addr);
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seq_printf(s, "hop4_pte: 0x%llx\n", hop4_pte);
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if (!(hop4_pte & LAST_MASK)) {
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seq_printf(s, "hop5_addr: 0x%llx\n", hop5_addr);
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seq_printf(s, "hop5_pte_addr: 0x%llx\n", hop5_pte_addr);
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seq_printf(s, "hop5_pte: 0x%llx\n", hop5_pte);
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}
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}
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goto out;
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