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spi: bcm2835: clock divider can be a multiple of 2

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The official documentation is wrong in this respect.
Has been tested empirically for dividers 2-1024

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Martin Sperl 2015-03-19 09:01:52 +00:00 committed by Mark Brown
parent 4adf312976
commit 210b49231a
1 changed files with 3 additions and 2 deletions
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5
drivers/spi/spi-bcm2835.c
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@ -153,8 +153,9 @@ static int bcm2835_spi_start_transfer(struct spi_device *spi,
if (spi_hz >= clk_hz / 2) {
cdiv = 2; /* clk_hz/2 is the fastest we can go */
} else if (spi_hz) {
/* CDIV must be a power of two */
cdiv = roundup_pow_of_two(DIV_ROUND_UP(clk_hz, spi_hz));
/* CDIV must be a multiple of two */
cdiv = DIV_ROUND_UP(clk_hz, spi_hz);
cdiv += (cdiv % 2);
if (cdiv >= 65536)
cdiv = 0; /* 0 is the slowest we can go */