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[MIPS] SMTC: Fix false trigger of debug code on single VPE.
Make smtc_setup_irq() update the list of interrupts which need to be watched by the debug code itself. Also there is no need to initialize the IPI swint when running with a single VPE, so don't initialize it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -77,7 +77,7 @@ static struct smtc_ipi_q freeIPIq;
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void ipi_decode(struct smtc_ipi *);
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static void post_direct_ipi(int cpu, struct smtc_ipi *pipi);
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static void setup_cross_vpe_interrupts(void);
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static void setup_cross_vpe_interrupts(unsigned int nvpe);
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void init_smtc_stats(void);
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/* Global SMTC Status */
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@ -170,7 +170,10 @@ __setup("tintq=", tintq);
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int imstuckcount[2][8];
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/* vpemask represents IM/IE bits of per-VPE Status registers, low-to-high */
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int vpemask[2][8] = {{0,1,1,0,0,0,0,1},{0,1,0,0,0,0,0,1}};
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int vpemask[2][8] = {
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{0, 0, 1, 0, 0, 0, 0, 1},
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{0, 0, 0, 0, 0, 0, 0, 1}
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};
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int tcnoprog[NR_CPUS];
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static atomic_t idle_hook_initialized = {0};
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static int clock_hang_reported[NR_CPUS];
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@ -503,8 +506,7 @@ void mipsmt_prepare_cpus(void)
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/* If we have multiple VPEs running, set up the cross-VPE interrupt */
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if (nvpe > 1)
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setup_cross_vpe_interrupts();
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setup_cross_vpe_interrupts(nvpe);
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/* Set up queue of free IPI "messages". */
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nipi = NR_CPUS * IPIBUF_PER_CPU;
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@ -609,7 +611,12 @@ void smtc_cpus_done(void)
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int setup_irq_smtc(unsigned int irq, struct irqaction * new,
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unsigned long hwmask)
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{
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unsigned int vpe = current_cpu_data.vpe_id;
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irq_hwmask[irq] = hwmask;
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#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG
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vpemask[vpe][irq - MIPSCPU_INT_BASE] = 1;
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#endif
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return setup_irq(irq, new);
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}
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@ -970,8 +977,11 @@ static void ipi_irq_dispatch(void)
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static struct irqaction irq_ipi;
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static void setup_cross_vpe_interrupts(void)
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static void setup_cross_vpe_interrupts(unsigned int nvpe)
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{
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if (nvpe < 1)
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return;
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if (!cpu_has_vint)
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panic("SMTC Kernel requires Vectored Interupt support");
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