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arm64: dts: allwinner: h6: Add HDMI pipeline

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This commit adds all entries needed for HDMI to function properly.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
[added DE3 bus]
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This commit is contained in:
Jernej Skrabec 2018-11-04 19:27:04 +01:00 committed by Maxime Ripard
parent cee98cefbf
commit 209065c5fd
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GPG Key ID: E3EF0D6F671851C5
1 changed files with 201 additions and 0 deletions
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201
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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@ -6,8 +6,11 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun50i-h6-ccu.h>
#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-tcon-top.h>
#include <dt-bindings/reset/sun50i-h6-ccu.h>
#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
#include <dt-bindings/reset/sun8i-de2.h>
/ {
interrupt-parent = <&gic>;
@ -47,6 +50,12 @@ cpu3: cpu@3 {
};
};
de: display-engine {
compatible = "allwinner,sun50i-h6-display-engine";
allwinner,pipelines = <&mixer0>;
status = "disabled";
};
iosc: internal-osc-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
@ -92,6 +101,51 @@ soc {
#size-cells = <1>;
ranges;
display-engine@1000000 {
compatible = "allwinner,sun50i-h6-de3",
"allwinner,sun50i-a64-de2";
reg = <0x1000000 0x400000>;
allwinner,sram = <&de2_sram 1>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x1000000 0x400000>;
display_clocks: clock@0 {
compatible = "allwinner,sun50i-h6-de3-clk";
reg = <0x0 0x10000>;
clocks = <&ccu CLK_DE>,
<&ccu CLK_BUS_DE>;
clock-names = "mod",
"bus";
resets = <&ccu RST_BUS_DE>;
#clock-cells = <1>;
#reset-cells = <1>;
};
mixer0: mixer@100000 {
compatible = "allwinner,sun50i-h6-de3-mixer-0";
reg = <0x100000 0x100000>;
clocks = <&display_clocks CLK_BUS_MIXER0>,
<&display_clocks CLK_MIXER0>;
clock-names = "bus",
"mod";
resets = <&display_clocks RST_MIXER0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
mixer0_out: port@1 {
reg = <1>;
mixer0_out_tcon_top_mixer0: endpoint {
remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
};
};
};
};
};
syscon: syscon@3000000 {
compatible = "allwinner,sun50i-h6-system-control",
"allwinner,sun50i-a64-system-control";
@ -157,6 +211,11 @@ ext_rgmii_pins: rgmii_pins {
drive-strength = <40>;
};
hdmi_pins: hdmi-pins {
pins = "PH8", "PH9", "PH10";
function = "hdmi";
};
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@ -286,6 +345,148 @@ mdio: mdio {
};
};
hdmi: hdmi@6000000 {
compatible = "allwinner,sun50i-h6-dw-hdmi";
reg = <0x06000000 0x10000>;
reg-io-width = <1>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
<&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
<&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>;
clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
"hdcp-bus";
resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDCP>;
reset-names = "ctrl", "hdcp";
phys = <&hdmi_phy>;
phy-names = "hdmi-phy";
pinctrl-names = "default";
pinctrl-0 = <&hdmi_pins>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
hdmi_in: port@0 {
reg = <0>;
hdmi_in_tcon_top: endpoint {
remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
};
};
hdmi_out: port@1 {
reg = <1>;
};
};
};
hdmi_phy: hdmi-phy@6010000 {
compatible = "allwinner,sun50i-h6-hdmi-phy";
reg = <0x06010000 0x10000>;
clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>;
clock-names = "bus", "mod";
resets = <&ccu RST_BUS_HDMI>;
reset-names = "phy";
#phy-cells = <0>;
};
tcon_top: tcon-top@6510000 {
compatible = "allwinner,sun50i-h6-tcon-top";
reg = <0x06510000 0x1000>;
clocks = <&ccu CLK_BUS_TCON_TOP>,
<&ccu CLK_TCON_TV0>;
clock-names = "bus",
"tcon-tv0";
clock-output-names = "tcon-top-tv0";
resets = <&ccu RST_BUS_TCON_TOP>;
reset-names = "rst";
#clock-cells = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
tcon_top_mixer0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tcon_top_mixer0_in_mixer0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
};
};
tcon_top_mixer0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tcon_top_mixer0_out_tcon_tv: endpoint@2 {
reg = <2>;
remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>;
};
};
tcon_top_hdmi_in: port@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
tcon_top_hdmi_in_tcon_tv: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon_tv_out_tcon_top>;
};
};
tcon_top_hdmi_out: port@5 {
reg = <5>;
tcon_top_hdmi_out_hdmi: endpoint {
remote-endpoint = <&hdmi_in_tcon_top>;
};
};
};
};
tcon_tv: lcd-controller@6515000 {
compatible = "allwinner,sun50i-h6-tcon-tv",
"allwinner,sun8i-r40-tcon-tv";
reg = <0x06515000 0x1000>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_TCON_TV0>,
<&tcon_top CLK_TCON_TOP_TV0>;
clock-names = "ahb",
"tcon-ch1";
resets = <&ccu RST_BUS_TCON_TV0>;
reset-names = "lcd";
ports {
#address-cells = <1>;
#size-cells = <0>;
tcon_tv_in: port@0 {
reg = <0>;
tcon_tv_in_tcon_top_mixer0: endpoint {
remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>;
};
};
tcon_tv_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tcon_tv_out_tcon_top: endpoint@1 {
reg = <1>;
remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>;
};
};
};
};
r_ccu: clock@7010000 {
compatible = "allwinner,sun50i-h6-r-ccu";
reg = <0x07010000 0x400>;