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drm/i915: Do pipe updates after enables for everyone
Currently only port sync pipes do the sequence such that we first do the modeset part for every pipe and then do the plane/etc. updates. Let's follow that apporach for all pipes in skl+ so that we can properly integrate the port sync into the normal modeset flow. v2: Remove now stale TODO of port sync slave entries[] s/oldnew/new/ Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200313164831.5980-12-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
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@ -15152,17 +15152,6 @@ static void intel_update_trans_port_sync_crtcs(struct intel_atomic_state *state,
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usleep_range(200, 400);
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intel_set_dp_tp_ctl_normal(state, crtc);
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for_each_new_intel_crtc_in_state(state, slave_crtc,
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new_slave_crtc_state, i) {
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if (new_slave_crtc_state->master_transcoder !=
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new_crtc_state->cpu_transcoder)
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continue;
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intel_update_crtc(state, slave_crtc);
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}
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intel_update_crtc(state, crtc);
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}
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static void icl_dbuf_slice_pre_update(struct intel_atomic_state *state)
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@ -15251,6 +15240,8 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
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}
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}
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update_pipes = modeset_pipes;
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/*
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* Enable all pipes that needs a modeset and do not depends on other
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* pipes
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@ -15265,10 +15256,6 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
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is_trans_port_sync_slave(new_crtc_state))
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continue;
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drm_WARN_ON(&dev_priv->drm, skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
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entries, I915_MAX_PIPES, pipe));
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entries[pipe] = new_crtc_state->wm.skl.ddb;
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modeset_pipes &= ~BIT(pipe);
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if (is_trans_port_sync_mode(new_crtc_state)) {
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@ -15284,19 +15271,17 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
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new_crtc_state->cpu_transcoder)
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continue;
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/* TODO: update entries[] of slave */
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modeset_pipes &= ~BIT(slave_crtc->pipe);
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}
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} else {
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intel_enable_crtc(state, crtc);
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intel_update_crtc(state, crtc);
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}
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}
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/*
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* Finally enable all pipes that needs a modeset and depends on
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* other pipes, right now it is only MST slaves as both port sync slave
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* and master are enabled together
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* Then we enable all remaining pipes that depend on other
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* pipes, right now it is only MST slaves as both port sync
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* slave and master are enabled together
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*/
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for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
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enum pipe pipe = crtc->pipe;
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@ -15304,18 +15289,31 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
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if ((modeset_pipes & BIT(pipe)) == 0)
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continue;
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modeset_pipes &= ~BIT(pipe);
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intel_enable_crtc(state, crtc);
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}
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/*
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* Finally we do the plane updates/etc. for all pipes that got enabled.
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*/
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for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
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enum pipe pipe = crtc->pipe;
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if ((update_pipes & BIT(pipe)) == 0)
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continue;
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drm_WARN_ON(&dev_priv->drm, skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
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entries, I915_MAX_PIPES, pipe));
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entries[pipe] = new_crtc_state->wm.skl.ddb;
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modeset_pipes &= ~BIT(pipe);
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update_pipes &= ~BIT(pipe);
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intel_enable_crtc(state, crtc);
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intel_update_crtc(state, crtc);
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}
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drm_WARN_ON(&dev_priv->drm, modeset_pipes);
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drm_WARN_ON(&dev_priv->drm, update_pipes);
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}
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static void intel_atomic_helper_free_state(struct drm_i915_private *dev_priv)
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