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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-03-07 00:00:25 +07:00
igb: Prevent dropped Tx timestamps via work items and interrupts.
In rare circumstances, it's possible a descriptor writeback will occur before a timestamped Tx packet will go out on the wire, leading to the driver believing the hardware failed to timestamp the packet. Schedule a work item for 82576 and use the available time sync interrupt registers on 82580 and above to account for this. Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Matthew Vick <matthew.vick@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
parent
201987e3d0
commit
1f6e8178d6
@ -360,6 +360,7 @@
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#define E1000_ICR_RXDMT0 0x00000010 /* rx desc min. threshold (0) */
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#define E1000_ICR_RXT0 0x00000080 /* rx timer intr (ring 0) */
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#define E1000_ICR_VMMB 0x00000100 /* VM MB event */
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#define E1000_ICR_TS 0x00080000 /* Time Sync Interrupt */
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#define E1000_ICR_DRSTA 0x40000000 /* Device Reset Asserted */
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/* If this bit asserted, the driver should claim the interrupt */
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#define E1000_ICR_INT_ASSERTED 0x80000000
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@ -399,6 +400,7 @@
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#define E1000_IMS_TXDW E1000_ICR_TXDW /* Transmit desc written back */
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#define E1000_IMS_LSC E1000_ICR_LSC /* Link Status Change */
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#define E1000_IMS_VMMB E1000_ICR_VMMB /* Mail box activity */
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#define E1000_IMS_TS E1000_ICR_TS /* Time Sync Interrupt */
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#define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* rx sequence error */
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#define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */
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#define E1000_IMS_RXT0 E1000_ICR_RXT0 /* rx timer intr */
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@ -510,6 +512,9 @@
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#define E1000_TIMINCA_16NS_SHIFT 24
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#define E1000_TSICR_TXTS 0x00000002
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#define E1000_TSIM_TXTS 0x00000002
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#define E1000_MDICNFG_EXT_MDIO 0x80000000 /* MDI ext/int destination */
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#define E1000_MDICNFG_COM_MDIO 0x40000000 /* MDI shared w/ lan 0 */
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#define E1000_MDICNFG_PHY_MASK 0x03E00000
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@ -91,6 +91,8 @@
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#define E1000_TIMINCA 0x0B608 /* Increment attributes register - RW */
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#define E1000_TSAUXC 0x0B640 /* Timesync Auxiliary Control register */
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#define E1000_SYSTIMR 0x0B6F8 /* System time register Residue */
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#define E1000_TSICR 0x0B66C /* Interrupt Cause Register */
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#define E1000_TSIM 0x0B674 /* Interrupt Mask Register */
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/* Filtering Registers */
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#define E1000_SAQF(_n) (0x5980 + 4 * (_n))
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@ -381,6 +381,8 @@ struct igb_adapter {
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struct ptp_clock *ptp_clock;
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struct ptp_clock_info ptp_caps;
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struct delayed_work ptp_overflow_work;
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struct work_struct ptp_tx_work;
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struct sk_buff *ptp_tx_skb;
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spinlock_t tmreg_lock;
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struct cyclecounter cc;
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struct timecounter tc;
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@ -394,6 +396,7 @@ struct igb_adapter {
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#define IGB_FLAG_QUAD_PORT_A (1 << 2)
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#define IGB_FLAG_QUEUE_PAIRS (1 << 3)
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#define IGB_FLAG_DMAC (1 << 4)
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#define IGB_FLAG_PTP (1 << 5)
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/* DMA Coalescing defines */
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#define IGB_MIN_TXPBSIZE 20408
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@ -440,8 +443,9 @@ extern void igb_set_fw_version(struct igb_adapter *);
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#ifdef CONFIG_IGB_PTP
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extern void igb_ptp_init(struct igb_adapter *adapter);
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extern void igb_ptp_stop(struct igb_adapter *adapter);
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extern void igb_ptp_tx_hwtstamp(struct igb_q_vector *q_vector,
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struct igb_tx_buffer *buffer_info);
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extern void igb_ptp_reset(struct igb_adapter *adapter);
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extern void igb_ptp_tx_work(struct work_struct *work);
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extern void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter);
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extern void igb_ptp_rx_hwtstamp(struct igb_q_vector *q_vector,
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union e1000_adv_rx_desc *rx_desc,
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struct sk_buff *skb);
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@ -1751,6 +1751,11 @@ void igb_reset(struct igb_adapter *adapter)
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/* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
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wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
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#ifdef CONFIG_IGB_PTP
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/* Re-enable PTP, where applicable. */
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igb_ptp_reset(adapter);
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#endif /* CONFIG_IGB_PTP */
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igb_get_phy_info(hw);
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}
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@ -4234,7 +4239,7 @@ static __le32 igb_tx_cmd_type(u32 tx_flags)
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#ifdef CONFIG_IGB_PTP
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/* set timestamp bit if present */
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if (tx_flags & IGB_TX_FLAGS_TSTAMP)
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if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP))
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cmd_type |= cpu_to_le32(E1000_ADVTXD_MAC_TSTAMP);
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#endif /* CONFIG_IGB_PTP */
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@ -4445,6 +4450,9 @@ static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
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netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
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struct igb_ring *tx_ring)
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{
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#ifdef CONFIG_IGB_PTP
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struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
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#endif /* CONFIG_IGB_PTP */
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struct igb_tx_buffer *first;
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int tso;
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u32 tx_flags = 0;
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@ -4468,9 +4476,14 @@ netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
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first->gso_segs = 1;
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#ifdef CONFIG_IGB_PTP
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if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
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if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
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!(adapter->ptp_tx_skb))) {
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skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
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tx_flags |= IGB_TX_FLAGS_TSTAMP;
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adapter->ptp_tx_skb = skb_get(skb);
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if (adapter->hw.mac.type == e1000_82576)
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schedule_work(&adapter->ptp_tx_work);
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}
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#endif /* CONFIG_IGB_PTP */
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@ -4859,6 +4872,19 @@ static irqreturn_t igb_msix_other(int irq, void *data)
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mod_timer(&adapter->watchdog_timer, jiffies + 1);
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}
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#ifdef CONFIG_IGB_PTP
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if (icr & E1000_ICR_TS) {
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u32 tsicr = rd32(E1000_TSICR);
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if (tsicr & E1000_TSICR_TXTS) {
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/* acknowledge the interrupt */
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wr32(E1000_TSICR, E1000_TSICR_TXTS);
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/* retrieve hardware timestamp */
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schedule_work(&adapter->ptp_tx_work);
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}
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}
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#endif /* CONFIG_IGB_PTP */
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wr32(E1000_EIMS, adapter->eims_other);
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return IRQ_HANDLED;
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@ -5650,6 +5676,19 @@ static irqreturn_t igb_intr_msi(int irq, void *data)
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mod_timer(&adapter->watchdog_timer, jiffies + 1);
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}
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#ifdef CONFIG_IGB_PTP
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if (icr & E1000_ICR_TS) {
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u32 tsicr = rd32(E1000_TSICR);
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if (tsicr & E1000_TSICR_TXTS) {
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/* acknowledge the interrupt */
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wr32(E1000_TSICR, E1000_TSICR_TXTS);
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/* retrieve hardware timestamp */
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schedule_work(&adapter->ptp_tx_work);
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}
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}
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#endif /* CONFIG_IGB_PTP */
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napi_schedule(&q_vector->napi);
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return IRQ_HANDLED;
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@ -5691,6 +5730,19 @@ static irqreturn_t igb_intr(int irq, void *data)
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mod_timer(&adapter->watchdog_timer, jiffies + 1);
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}
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#ifdef CONFIG_IGB_PTP
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if (icr & E1000_ICR_TS) {
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u32 tsicr = rd32(E1000_TSICR);
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if (tsicr & E1000_TSICR_TXTS) {
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/* acknowledge the interrupt */
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wr32(E1000_TSICR, E1000_TSICR_TXTS);
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/* retrieve hardware timestamp */
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schedule_work(&adapter->ptp_tx_work);
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}
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}
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#endif /* CONFIG_IGB_PTP */
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napi_schedule(&q_vector->napi);
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return IRQ_HANDLED;
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@ -5794,11 +5846,6 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
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total_bytes += tx_buffer->bytecount;
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total_packets += tx_buffer->gso_segs;
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#ifdef CONFIG_IGB_PTP
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/* retrieve hardware timestamp */
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igb_ptp_tx_hwtstamp(q_vector, tx_buffer);
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#endif /* CONFIG_IGB_PTP */
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/* free the skb */
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dev_kfree_skb_any(tx_buffer->skb);
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tx_buffer->skb = NULL;
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@ -289,6 +289,31 @@ static int igb_ptp_enable(struct ptp_clock_info *ptp,
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return -EOPNOTSUPP;
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}
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/**
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* igb_ptp_tx_work
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* @work: pointer to work struct
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*
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* This work function polls the TSYNCTXCTL valid bit to determine when a
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* timestamp has been taken for the current stored skb.
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*/
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void igb_ptp_tx_work(struct work_struct *work)
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{
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struct igb_adapter *adapter = container_of(work, struct igb_adapter,
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ptp_tx_work);
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struct e1000_hw *hw = &adapter->hw;
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u32 tsynctxctl;
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if (!adapter->ptp_tx_skb)
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return;
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tsynctxctl = rd32(E1000_TSYNCTXCTL);
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if (tsynctxctl & E1000_TSYNCTXCTL_VALID)
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igb_ptp_tx_hwtstamp(adapter);
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else
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/* reschedule to check later */
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schedule_work(&adapter->ptp_tx_work);
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}
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static void igb_ptp_overflow_check(struct work_struct *work)
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{
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struct igb_adapter *igb =
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@ -305,31 +330,25 @@ static void igb_ptp_overflow_check(struct work_struct *work)
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/**
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* igb_ptp_tx_hwtstamp - utility function which checks for TX time stamp
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* @q_vector: pointer to q_vector containing needed info
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* @buffer: pointer to igb_tx_buffer structure
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* @adapter: Board private structure.
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*
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* If we were asked to do hardware stamping and such a time stamp is
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* available, then it must have been for this skb here because we only
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* allow only one such packet into the queue.
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*/
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void igb_ptp_tx_hwtstamp(struct igb_q_vector *q_vector,
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struct igb_tx_buffer *buffer_info)
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void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter)
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{
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struct igb_adapter *adapter = q_vector->adapter;
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struct e1000_hw *hw = &adapter->hw;
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struct skb_shared_hwtstamps shhwtstamps;
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u64 regval;
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/* if skb does not support hw timestamp or TX stamp not valid exit */
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if (likely(!(buffer_info->tx_flags & IGB_TX_FLAGS_TSTAMP)) ||
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!(rd32(E1000_TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID))
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return;
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regval = rd32(E1000_TXSTMPL);
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regval |= (u64)rd32(E1000_TXSTMPH) << 32;
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igb_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
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skb_tstamp_tx(buffer_info->skb, &shhwtstamps);
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skb_tstamp_tx(adapter->ptp_tx_skb, &shhwtstamps);
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dev_kfree_skb_any(adapter->ptp_tx_skb);
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adapter->ptp_tx_skb = NULL;
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}
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void igb_ptp_rx_hwtstamp(struct igb_q_vector *q_vector,
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@ -603,16 +622,26 @@ void igb_ptp_init(struct igb_adapter *adapter)
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spin_lock_init(&adapter->tmreg_lock);
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INIT_WORK(&adapter->ptp_tx_work, igb_ptp_tx_work);
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schedule_delayed_work(&adapter->ptp_overflow_work,
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IGB_SYSTIM_OVERFLOW_PERIOD);
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/* Initialize the time sync interrupts for devices that support it. */
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if (hw->mac.type >= e1000_82580) {
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wr32(E1000_TSIM, E1000_TSIM_TXTS);
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wr32(E1000_IMS, E1000_IMS_TS);
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}
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adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps);
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if (IS_ERR(adapter->ptp_clock)) {
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adapter->ptp_clock = NULL;
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dev_err(&adapter->pdev->dev, "ptp_clock_register failed\n");
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} else
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} else {
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dev_info(&adapter->pdev->dev, "added PHC on %s\n",
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adapter->netdev->name);
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adapter->flags |= IGB_FLAG_PTP;
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}
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}
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/**
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@ -624,20 +653,61 @@ void igb_ptp_init(struct igb_adapter *adapter)
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void igb_ptp_stop(struct igb_adapter *adapter)
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{
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switch (adapter->hw.mac.type) {
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case e1000_i211:
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case e1000_i210:
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case e1000_i350:
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case e1000_82580:
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case e1000_82576:
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case e1000_82580:
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case e1000_i350:
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cancel_delayed_work_sync(&adapter->ptp_overflow_work);
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break;
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case e1000_i210:
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case e1000_i211:
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/* No delayed work to cancel. */
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break;
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default:
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return;
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}
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cancel_work_sync(&adapter->ptp_tx_work);
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if (adapter->ptp_clock) {
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ptp_clock_unregister(adapter->ptp_clock);
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dev_info(&adapter->pdev->dev, "removed PHC on %s\n",
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adapter->netdev->name);
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adapter->flags &= ~IGB_FLAG_PTP;
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}
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}
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/**
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* igb_ptp_reset - Re-enable the adapter for PTP following a reset.
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* @adapter: Board private structure.
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*
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* This function handles the reset work required to re-enable the PTP device.
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**/
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void igb_ptp_reset(struct igb_adapter *adapter)
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{
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struct e1000_hw *hw = &adapter->hw;
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if (!(adapter->flags & IGB_FLAG_PTP))
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return;
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switch (adapter->hw.mac.type) {
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case e1000_82576:
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/* Dial the nominal frequency. */
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wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
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break;
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case e1000_82580:
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case e1000_i350:
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case e1000_i210:
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case e1000_i211:
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/* Enable the timer functions and interrupts. */
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wr32(E1000_TSAUXC, 0x0);
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wr32(E1000_TSIM, E1000_TSIM_TXTS);
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wr32(E1000_IMS, E1000_IMS_TS);
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break;
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default:
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/* No work to do. */
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return;
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}
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timecounter_init(&adapter->tc, &adapter->cc,
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ktime_to_ns(ktime_get_real()));
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}
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