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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 18:56:44 +07:00
wl1271: Support firmware RX packet aggregation
Instead of retrieving one packet at a time from the firmware, try to retrieve all available packets at once. This optimization decreases the number of transactions, which saves CPU cycles and increases network throughput. Signed-off-by: Ido Yariv <ido@wizery.com> Tested-by: Juuso Oikarinen <juuso.oikarinen@nokia.com> Signed-off-by: Luciano Coelho <luciano.coelho@nokia.com>
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@ -130,6 +130,8 @@ enum {
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#define ACX_TX_DESCRIPTORS 32
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#define WL1271_AGGR_BUFFER_SIZE (4 * PAGE_SIZE)
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enum wl1271_state {
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WL1271_STATE_OFF,
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WL1271_STATE_ON,
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@ -408,6 +410,9 @@ struct wl1271 {
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/* Rx memory pool address */
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struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
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/* Intermediate buffer, used for packet aggregation */
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u8 *aggr_buf;
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/* The target interrupt mask */
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struct work_struct irq_work;
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@ -2459,6 +2459,7 @@ struct ieee80211_hw *wl1271_alloc_hw(void)
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struct platform_device *plat_dev = NULL;
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struct wl1271 *wl;
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int i, ret;
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unsigned int order;
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hw = ieee80211_alloc_hw(sizeof(*wl), &wl1271_ops);
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if (!hw) {
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@ -2517,11 +2518,18 @@ struct ieee80211_hw *wl1271_alloc_hw(void)
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wl1271_debugfs_init(wl);
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order = get_order(WL1271_AGGR_BUFFER_SIZE);
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wl->aggr_buf = (u8 *)__get_free_pages(GFP_KERNEL, order);
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if (!wl->aggr_buf) {
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ret = -ENOMEM;
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goto err_hw;
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}
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/* Register platform device */
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ret = platform_device_register(wl->plat_dev);
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if (ret) {
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wl1271_error("couldn't register platform device");
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goto err_hw;
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goto err_aggr;
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}
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dev_set_drvdata(&wl->plat_dev->dev, wl);
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@ -2547,6 +2555,9 @@ struct ieee80211_hw *wl1271_alloc_hw(void)
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err_platform:
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platform_device_unregister(wl->plat_dev);
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err_aggr:
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free_pages((unsigned long)wl->aggr_buf, order);
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err_hw:
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wl1271_debugfs_exit(wl);
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kfree(plat_dev);
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@ -2563,6 +2574,8 @@ EXPORT_SYMBOL_GPL(wl1271_alloc_hw);
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int wl1271_free_hw(struct wl1271 *wl)
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{
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platform_device_unregister(wl->plat_dev);
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free_pages((unsigned long)wl->aggr_buf,
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get_order(WL1271_AGGR_BUFFER_SIZE));
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kfree(wl->plat_dev);
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wl1271_debugfs_exit(wl);
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@ -74,7 +74,7 @@ static void wl1271_rx_status(struct wl1271 *wl,
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}
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}
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static void wl1271_rx_handle_data(struct wl1271 *wl, u32 length)
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static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length)
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{
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struct wl1271_rx_descriptor *desc;
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struct sk_buff *skb;
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@ -87,16 +87,16 @@ static void wl1271_rx_handle_data(struct wl1271 *wl, u32 length)
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* workaround this by not retrieving them at all.
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*/
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if (unlikely(wl->state == WL1271_STATE_PLT))
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return;
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return -EINVAL;
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skb = __dev_alloc_skb(length, GFP_KERNEL);
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if (!skb) {
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wl1271_error("Couldn't allocate RX frame");
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return;
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return -ENOMEM;
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}
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buf = skb_put(skb, length);
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wl1271_read(wl, WL1271_SLV_MEM_DATA, buf, length, true);
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memcpy(buf, data, length);
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/* the data read starts with the descriptor */
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desc = (struct wl1271_rx_descriptor *) buf;
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@ -116,6 +116,8 @@ static void wl1271_rx_handle_data(struct wl1271 *wl, u32 length)
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skb_trim(skb, skb->len - desc->pad_len);
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ieee80211_rx_ni(wl->hw, skb);
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return 0;
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}
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void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_status *status)
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@ -124,31 +126,60 @@ void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_status *status)
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u32 buf_size;
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u32 fw_rx_counter = status->fw_rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
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u32 drv_rx_counter = wl->rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
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u32 rx_counter;
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u32 mem_block;
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u32 pkt_length;
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u32 pkt_offset;
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while (drv_rx_counter != fw_rx_counter) {
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mem_block = wl1271_rx_get_mem_block(status, drv_rx_counter);
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buf_size = wl1271_rx_get_buf_size(status, drv_rx_counter);
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buf_size = 0;
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rx_counter = drv_rx_counter;
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while (rx_counter != fw_rx_counter) {
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pkt_length = wl1271_rx_get_buf_size(status, rx_counter);
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if (buf_size + pkt_length > WL1271_AGGR_BUFFER_SIZE)
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break;
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buf_size += pkt_length;
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rx_counter++;
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rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
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}
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if (buf_size == 0) {
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wl1271_warning("received empty data");
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break;
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}
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/*
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* Choose the block we want to read
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* For aggregated packets, only the first memory block should
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* be retrieved. The FW takes care of the rest.
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*/
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mem_block = wl1271_rx_get_mem_block(status, drv_rx_counter);
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wl->rx_mem_pool_addr.addr = (mem_block << 8) +
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le32_to_cpu(wl_mem_map->packet_memory_pool_start);
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wl->rx_mem_pool_addr.addr_extra =
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wl->rx_mem_pool_addr.addr + 4;
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/* Choose the block we want to read */
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wl1271_write(wl, WL1271_SLV_REG_DATA, &wl->rx_mem_pool_addr,
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sizeof(wl->rx_mem_pool_addr), false);
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sizeof(wl->rx_mem_pool_addr), false);
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wl1271_rx_handle_data(wl, buf_size);
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/* Read all available packets at once */
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wl1271_read(wl, WL1271_SLV_MEM_DATA, wl->aggr_buf,
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buf_size, true);
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wl->rx_counter++;
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drv_rx_counter = wl->rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
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/* Split data into separate packets */
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pkt_offset = 0;
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while (pkt_offset < buf_size) {
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pkt_length = wl1271_rx_get_buf_size(status,
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drv_rx_counter);
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if (wl1271_rx_handle_data(wl,
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wl->aggr_buf + pkt_offset,
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pkt_length) < 0)
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break;
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wl->rx_counter++;
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drv_rx_counter++;
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drv_rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
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pkt_offset += pkt_length;
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}
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}
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wl1271_write32(wl, RX_DRIVER_COUNTER_ADDRESS, wl->rx_counter);
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wl1271_write32(wl, RX_DRIVER_COUNTER_ADDRESS,
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cpu_to_le32(wl->rx_counter));
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}
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