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iwl3945: use hw_params.rx_buf_size
This patch makes 3945 use of hw_params.rx_buf_size instead of IWL_RX_BUF_SIZE. It also renames IWL_RX_BUF_SIZE to IWL_RX_BUF_SIZE_3K and moves rx buffer defines into iwl-fh.h. Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -2485,7 +2485,7 @@ int iwl3945_hw_set_hw_params(struct iwl_priv *priv)
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return -ENOMEM;
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}
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priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE;
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priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_3K;
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priv->hw_params.max_pkt_size = 2342;
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priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
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priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
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@ -96,7 +96,6 @@ enum iwl3945_antenna {
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* else RTS for data/management frames where MPDU is larger
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* than RTS value.
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*/
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#define IWL_RX_BUF_SIZE 3000U
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#define DEFAULT_RTS_THRESHOLD 2347U
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#define MIN_RTS_THRESHOLD 0U
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#define MAX_RTS_THRESHOLD 2347U
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@ -110,19 +110,6 @@
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#define IWL_DEFAULT_TX_RETRY 15
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#define RX_QUEUE_SIZE 256
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#define RX_QUEUE_MASK 255
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#define RX_QUEUE_SIZE_LOG 8
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/*
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* RX related structures and functions
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*/
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#define RX_FREE_BUFFERS 64
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#define RX_LOW_WATERMARK 8
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/* Size of one Rx buffer in host DRAM */
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#define IWL_RX_BUF_SIZE_4K (4 * 1024)
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#define IWL_RX_BUF_SIZE_8K (8 * 1024)
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/* Sizes and addresses for instruction and data memory (SRAM) in
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* 4965's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */
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@ -399,6 +399,21 @@
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*/
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#define FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN (0x00000002)
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#define RX_QUEUE_SIZE 256
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#define RX_QUEUE_MASK 255
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#define RX_QUEUE_SIZE_LOG 8
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/*
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* RX related structures and functions
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*/
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#define RX_FREE_BUFFERS 64
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#define RX_LOW_WATERMARK 8
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/* Size of one Rx buffer in host DRAM */
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#define IWL_RX_BUF_SIZE_3K (3 * 1000) /* 3945 only */
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#define IWL_RX_BUF_SIZE_4K (4 * 1024)
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#define IWL_RX_BUF_SIZE_8K (8 * 1024)
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/**
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* struct iwl_rb_status - reseve buffer status
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* host memory mapped FH registers
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@ -3281,7 +3281,8 @@ static void iwl3945_rx_allocate(struct iwl_priv *priv)
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/* Alloc a new receive buffer */
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rxb->skb =
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alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
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alloc_skb(priv->hw_params.rx_buf_size,
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__GFP_NOWARN | GFP_ATOMIC);
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if (!rxb->skb) {
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if (net_ratelimit())
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IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
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@ -3303,9 +3304,10 @@ static void iwl3945_rx_allocate(struct iwl_priv *priv)
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list_del(element);
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/* Get physical address of RB/SKB */
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rxb->real_dma_addr =
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pci_map_single(priv->pci_dev, rxb->skb->data,
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IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
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rxb->real_dma_addr = pci_map_single(priv->pci_dev,
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rxb->skb->data,
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priv->hw_params.rx_buf_size,
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PCI_DMA_FROMDEVICE);
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list_add_tail(&rxb->list, &rxq->rx_free);
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rxq->free_count++;
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}
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@ -3454,7 +3456,7 @@ static void iwl3945_rx_handle(struct iwl_priv *priv)
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rxq->queue[i] = NULL;
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pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
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IWL_RX_BUF_SIZE,
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priv->hw_params.rx_buf_size,
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PCI_DMA_FROMDEVICE);
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pkt = (struct iwl_rx_packet *)rxb->skb->data;
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@ -3504,7 +3506,8 @@ static void iwl3945_rx_handle(struct iwl_priv *priv)
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}
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pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
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IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
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priv->hw_params.rx_buf_size,
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PCI_DMA_FROMDEVICE);
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spin_lock_irqsave(&rxq->lock, flags);
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list_add_tail(&rxb->list, &priv->rxq.rx_used);
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spin_unlock_irqrestore(&rxq->lock, flags);
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