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i40e: defeature support for PTP L4 frame detection on XL710
A product decision has been made to defeature detection of PTP frames over L4 (UDP) on the XL710 MAC. Do not advertise support for L4 timestamping. Change-ID: I41fbb0f84ebb27c43e23098c08156f2625c6ee06 Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -360,6 +360,7 @@ struct i40e_pf {
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#define I40E_FLAG_PF_MAC BIT_ULL(50)
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#define I40E_FLAG_TRUE_PROMISC_SUPPORT BIT_ULL(51)
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#define I40E_FLAG_HAVE_CRT_RETIMER BIT_ULL(52)
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#define I40E_FLAG_PTP_L4_CAPABLE BIT_ULL(53)
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/* tracks features that get auto disabled by errors */
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u64 auto_disable_flags;
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@ -1681,8 +1681,19 @@ static int i40e_get_ts_info(struct net_device *dev,
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info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
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info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
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BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
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BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
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BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
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BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
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BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
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if (pf->flags & I40E_FLAG_PTP_L4_CAPABLE)
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info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
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BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
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BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
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BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
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BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
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BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
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BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
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BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
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return 0;
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}
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@ -8699,7 +8699,8 @@ static int i40e_sw_init(struct i40e_pf *pf)
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I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
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I40E_FLAG_NO_PCI_LINK_CHECK |
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I40E_FLAG_USE_SET_LLDP_MIB |
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I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
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I40E_FLAG_GENEVE_OFFLOAD_CAPABLE |
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I40E_FLAG_PTP_L4_CAPABLE;
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} else if ((pf->hw.aq.api_maj_ver > 1) ||
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((pf->hw.aq.api_maj_ver == 1) &&
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(pf->hw.aq.api_min_ver > 4))) {
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@ -521,6 +521,8 @@ static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,
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case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
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case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
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case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
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if (!(pf->flags & I40E_FLAG_PTP_L4_CAPABLE))
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return -ERANGE;
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pf->ptp_rx = true;
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tsyntype = I40E_PRTTSYN_CTL1_V1MESSTYPE0_MASK |
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I40E_PRTTSYN_CTL1_TSYNTYPE_V1 |
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@ -528,19 +530,26 @@ static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,
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config->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
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break;
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case HWTSTAMP_FILTER_PTP_V2_EVENT:
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case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
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case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
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case HWTSTAMP_FILTER_PTP_V2_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
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case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
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case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
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if (!(pf->flags & I40E_FLAG_PTP_L4_CAPABLE))
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return -ERANGE;
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/* fall through */
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case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
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case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
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pf->ptp_rx = true;
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tsyntype = I40E_PRTTSYN_CTL1_V2MESSTYPE0_MASK |
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I40E_PRTTSYN_CTL1_TSYNTYPE_V2 |
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I40E_PRTTSYN_CTL1_UDP_ENA_MASK;
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config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
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I40E_PRTTSYN_CTL1_TSYNTYPE_V2;
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if (pf->flags & I40E_FLAG_PTP_L4_CAPABLE) {
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tsyntype |= I40E_PRTTSYN_CTL1_UDP_ENA_MASK;
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config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
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} else {
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config->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
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}
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break;
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case HWTSTAMP_FILTER_ALL:
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default:
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