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drm/meson: add Amlogic Video FBC registers

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Add the registers of the VPU VD1 Amlogic FBC decoder module, and routing
register.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-3-narmstrong@baylibre.com
This commit is contained in:
Neil Armstrong 2020-07-03 10:07:24 +02:00
parent d6528ec883
commit 1d4eff8787
1 changed files with 22 additions and 0 deletions
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22
drivers/gpu/drm/meson/meson_registers.h
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@ -144,10 +144,15 @@
#define VIU_SW_RESET_OSD1 BIT(0)
#define VIU_MISC_CTRL0 0x1a06
#define VIU_CTRL0_VD1_AFBC_MASK 0x170000
#define VIU_CTRL0_AFBC_TO_VD1 BIT(20)
#define VIU_MISC_CTRL1 0x1a07
#define MALI_AFBC_MISC GENMASK(15, 8)
#define D2D3_INTF_LENGTH 0x1a08
#define D2D3_INTF_CTRL0 0x1a09
#define VD1_AFBCD0_MISC_CTRL 0x1a0a
#define VD1_AXI_SEL_AFBC (1 << 12)
#define AFBC_VD1_SEL (1 << 10)
#define VD2_AFBCD1_MISC_CTRL 0x1a0b
#define VIU_OSD1_CTRL_STAT 0x1a10
#define VIU_OSD1_OSD_BLK_ENABLE BIT(0)
#define VIU_OSD1_OSD_MEM_MODE_LINEAR BIT(2)
@ -365,6 +370,23 @@
#define VIU_OSD1_OETF_LUT_ADDR_PORT 0x1add
#define VIU_OSD1_OETF_LUT_DATA_PORT 0x1ade
#define AFBC_ENABLE 0x1ae0
#define AFBC_MODE 0x1ae1
#define AFBC_SIZE_IN 0x1ae2
#define AFBC_DEC_DEF_COLOR 0x1ae3
#define AFBC_CONV_CTRL 0x1ae4
#define AFBC_LBUF_DEPTH 0x1ae5
#define AFBC_HEAD_BADDR 0x1ae6
#define AFBC_BODY_BADDR 0x1ae7
#define AFBC_SIZE_OUT 0x1ae8
#define AFBC_OUT_YSCOPE 0x1ae9
#define AFBC_STAT 0x1aea
#define AFBC_VD_CFMT_CTRL 0x1aeb
#define AFBC_VD_CFMT_W 0x1aec
#define AFBC_MIF_HOR_SCOPE 0x1aed
#define AFBC_MIF_VER_SCOPE 0x1aee
#define AFBC_PIXEL_HOR_SCOPE 0x1aef
#define AFBC_PIXEL_VER_SCOPE 0x1af0
#define AFBC_VD_CFMT_H 0x1af1
/* vpp */
#define VPP_DUMMY_DATA 0x1d00