mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 04:25:18 +07:00
ath10k: add and fix some PCI prints
Add missing error reporting and adjust other prints to make everything more consistent. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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98563d5aaf
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1d2b48d617
@ -712,7 +712,7 @@ static int ath10k_pci_hif_send_head(struct ath10k *ar, u8 pipe_id,
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ret = ath10k_ce_send(ce_hdl, nbuf, skb_cb->paddr, len, transfer_id,
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flags);
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if (ret)
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ath10k_warn("CE send failed: %p\n", nbuf);
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ath10k_warn("failed to send sk_buff to CE: %p\n", nbuf);
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return ret;
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}
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@ -739,9 +739,10 @@ static void ath10k_pci_hif_dump_area(struct ath10k *ar)
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ar->fw_version_build);
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host_addr = host_interest_item_address(HI_ITEM(hi_failure_state));
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if (ath10k_pci_diag_read_mem(ar, host_addr,
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®_dump_area, sizeof(u32)) != 0) {
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ath10k_warn("could not read hi_failure_state\n");
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ret = ath10k_pci_diag_read_mem(ar, host_addr,
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®_dump_area, sizeof(u32));
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if (ret) {
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ath10k_err("failed to read FW dump area address: %d\n", ret);
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return;
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}
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@ -751,7 +752,7 @@ static void ath10k_pci_hif_dump_area(struct ath10k *ar)
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®_dump_values[0],
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REG_DUMP_COUNT_QCA988X * sizeof(u32));
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if (ret != 0) {
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ath10k_err("could not dump FW Dump Area\n");
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ath10k_err("failed to read FW dump area: %d\n", ret);
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return;
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}
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@ -973,8 +974,8 @@ static void ath10k_pci_process_ce(struct ath10k *ar)
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case ATH10K_PCI_COMPL_RECV:
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ret = ath10k_pci_post_rx_pipe(compl->pipe_info, 1);
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if (ret) {
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ath10k_warn("Unable to post recv buffer for pipe: %d\n",
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compl->pipe_info->pipe_num);
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ath10k_warn("failed to post RX buffer for pipe %d: %d\n",
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compl->pipe_info->pipe_num, ret);
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break;
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}
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@ -1113,7 +1114,7 @@ static int ath10k_pci_post_rx_pipe(struct ath10k_pci_pipe *pipe_info,
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for (i = 0; i < num; i++) {
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skb = dev_alloc_skb(pipe_info->buf_sz);
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if (!skb) {
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ath10k_warn("could not allocate skbuff for pipe %d\n",
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ath10k_warn("failed to allocate skbuff for pipe %d\n",
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num);
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ret = -ENOMEM;
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goto err;
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@ -1126,7 +1127,7 @@ static int ath10k_pci_post_rx_pipe(struct ath10k_pci_pipe *pipe_info,
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DMA_FROM_DEVICE);
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if (unlikely(dma_mapping_error(ar->dev, ce_data))) {
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ath10k_warn("could not dma map skbuff\n");
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ath10k_warn("failed to DMA map sk_buff\n");
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dev_kfree_skb_any(skb);
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ret = -EIO;
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goto err;
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@ -1141,7 +1142,7 @@ static int ath10k_pci_post_rx_pipe(struct ath10k_pci_pipe *pipe_info,
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ret = ath10k_ce_recv_buf_enqueue(ce_state, (void *)skb,
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ce_data);
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if (ret) {
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ath10k_warn("could not enqueue to pipe %d (%d)\n",
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ath10k_warn("failed to enqueue to pipe %d: %d\n",
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num, ret);
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goto err;
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}
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@ -1171,8 +1172,8 @@ static int ath10k_pci_post_rx(struct ath10k *ar)
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ret = ath10k_pci_post_rx_pipe(pipe_info,
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attr->dest_nentries - 1);
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if (ret) {
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ath10k_warn("Unable to replenish recv buffers for pipe: %d\n",
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pipe_num);
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ath10k_warn("failed to post RX buffer for pipe %d: %d\n",
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pipe_num, ret);
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for (; pipe_num >= 0; pipe_num--) {
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pipe_info = &ar_pci->pipe_info[pipe_num];
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@ -1192,14 +1193,15 @@ static int ath10k_pci_hif_start(struct ath10k *ar)
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ret = ath10k_pci_start_ce(ar);
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if (ret) {
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ath10k_warn("could not start CE (%d)\n", ret);
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ath10k_warn("failed to start CE: %d\n", ret);
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return ret;
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}
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/* Post buffers once to start things off. */
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ret = ath10k_pci_post_rx(ar);
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if (ret) {
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ath10k_warn("could not post rx pipes (%d)\n", ret);
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ath10k_warn("failed to post RX buffers for all pipes: %d\n",
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ret);
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return ret;
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}
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@ -1593,7 +1595,7 @@ static int ath10k_pci_wake_target_cpu(struct ath10k *ar)
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CORE_CTRL_ADDRESS,
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&core_ctrl);
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if (ret) {
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ath10k_warn("Unable to read core ctrl\n");
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ath10k_warn("failed to read core_ctrl: %d\n", ret);
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return ret;
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}
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@ -1603,10 +1605,13 @@ static int ath10k_pci_wake_target_cpu(struct ath10k *ar)
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ret = ath10k_pci_diag_write_access(ar, SOC_CORE_BASE_ADDRESS |
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CORE_CTRL_ADDRESS,
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core_ctrl);
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if (ret)
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ath10k_warn("Unable to set interrupt mask\n");
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if (ret) {
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ath10k_warn("failed to set target CPU interrupt mask: %d\n",
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ret);
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return ret;
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}
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return ret;
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return 0;
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}
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static int ath10k_pci_init_config(struct ath10k *ar)
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@ -1765,7 +1770,7 @@ static int ath10k_pci_ce_init(struct ath10k *ar)
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pipe_info->ce_hdl = ath10k_ce_init(ar, pipe_num, attr);
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if (pipe_info->ce_hdl == NULL) {
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ath10k_err("Unable to initialize CE for pipe: %d\n",
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ath10k_err("failed to initialize CE for pipe: %d\n",
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pipe_num);
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/* It is safe to call it here. It checks if ce_hdl is
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@ -1832,6 +1837,8 @@ static void ath10k_pci_start_bmi(struct ath10k *ar)
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pipe = &ar_pci->pipe_info[BMI_CE_NUM_TO_HOST];
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ath10k_ce_recv_cb_register(pipe->ce_hdl, ath10k_pci_bmi_recv_data);
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ath10k_dbg(ATH10K_DBG_BOOT, "boot start bmi\n");
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}
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static int ath10k_pci_hif_power_up(struct ath10k *ar)
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@ -1860,8 +1867,10 @@ static int ath10k_pci_hif_power_up(struct ath10k *ar)
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ath10k_do_pci_wake(ar);
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ret = ath10k_pci_ce_init(ar);
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if (ret)
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if (ret) {
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ath10k_err("failed to initialize CE: %d\n", ret);
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goto err_ps;
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}
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ret = ath10k_ce_disable_interrupts(ar);
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if (ret) {
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@ -1895,7 +1904,7 @@ static int ath10k_pci_hif_power_up(struct ath10k *ar)
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ret = ath10k_pci_wake_target_cpu(ar);
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if (ret) {
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ath10k_err("could not wake up target CPU (%d)\n", ret);
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ath10k_err("could not wake up target CPU: %d\n", ret);
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goto err_irq;
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}
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@ -2397,7 +2406,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
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ar = ath10k_core_create(ar_pci, ar_pci->dev, &ath10k_pci_hif_ops);
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if (!ar) {
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ath10k_err("ath10k_core_create failed!\n");
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ath10k_err("failed to create driver core\n");
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ret = -EINVAL;
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goto err_ar_pci;
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}
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@ -2416,20 +2425,20 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
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*/
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ret = pci_assign_resource(pdev, BAR_NUM);
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if (ret) {
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ath10k_err("cannot assign PCI space: %d\n", ret);
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ath10k_err("failed to assign PCI space: %d\n", ret);
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goto err_ar;
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}
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ret = pci_enable_device(pdev);
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if (ret) {
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ath10k_err("cannot enable PCI device: %d\n", ret);
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ath10k_err("failed to enable PCI device: %d\n", ret);
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goto err_ar;
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}
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/* Request MMIO resources */
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ret = pci_request_region(pdev, BAR_NUM, "ath");
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if (ret) {
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ath10k_err("PCI MMIO reservation error: %d\n", ret);
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ath10k_err("failed to request MMIO region: %d\n", ret);
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goto err_device;
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}
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@ -2439,13 +2448,13 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
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*/
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ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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if (ret) {
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ath10k_err("32-bit DMA not available: %d\n", ret);
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ath10k_err("failed to set DMA mask to 32-bit: %d\n", ret);
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goto err_region;
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}
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ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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if (ret) {
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ath10k_err("cannot enable 32-bit consistent DMA\n");
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ath10k_err("failed to set consistent DMA mask to 32-bit\n");
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goto err_region;
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}
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@ -2462,7 +2471,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
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/* Arrange for access to Target SoC registers. */
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mem = pci_iomap(pdev, BAR_NUM, 0);
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if (!mem) {
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ath10k_err("PCI iomap error\n");
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ath10k_err("failed to perform IOMAP for BAR%d\n", BAR_NUM);
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ret = -EIO;
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goto err_master;
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}
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@ -2485,7 +2494,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
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ret = ath10k_core_register(ar, chip_id);
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if (ret) {
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ath10k_err("could not register driver core (%d)\n", ret);
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ath10k_err("failed to register driver core: %d\n", ret);
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goto err_iomap;
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}
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@ -2551,7 +2560,7 @@ static int __init ath10k_pci_init(void)
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ret = pci_register_driver(&ath10k_pci_driver);
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if (ret)
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ath10k_err("pci_register_driver failed [%d]\n", ret);
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ath10k_err("failed to register PCI driver: %d\n", ret);
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return ret;
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}
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