drm/amdgpu: Rename amdgpu_display_framebuffer_domains()

It returns supported domains for display, and domains actually used are to be
decided later when pinned.

Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Samuel Li 2018-04-18 15:06:02 -04:00 committed by Alex Deucher
parent f526454800
commit 1d2361e5a6
5 changed files with 6 additions and 7 deletions

View File

@ -189,7 +189,7 @@ int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc,
goto cleanup; goto cleanup;
} }
r = amdgpu_bo_pin(new_abo, amdgpu_display_framebuffer_domains(adev), &base); r = amdgpu_bo_pin(new_abo, amdgpu_display_supported_domains(adev), &base);
if (unlikely(r != 0)) { if (unlikely(r != 0)) {
DRM_ERROR("failed to pin new abo buffer before flip\n"); DRM_ERROR("failed to pin new abo buffer before flip\n");
goto unreserve; goto unreserve;
@ -484,7 +484,7 @@ static const struct drm_framebuffer_funcs amdgpu_fb_funcs = {
.create_handle = drm_gem_fb_create_handle, .create_handle = drm_gem_fb_create_handle,
}; };
uint32_t amdgpu_display_framebuffer_domains(struct amdgpu_device *adev) uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev)
{ {
uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM; uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;

View File

@ -23,7 +23,7 @@
#ifndef __AMDGPU_DISPLAY_H__ #ifndef __AMDGPU_DISPLAY_H__
#define __AMDGPU_DISPLAY_H__ #define __AMDGPU_DISPLAY_H__
uint32_t amdgpu_display_framebuffer_domains(struct amdgpu_device *adev); uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev);
struct drm_framebuffer * struct drm_framebuffer *
amdgpu_display_user_framebuffer_create(struct drm_device *dev, amdgpu_display_user_framebuffer_create(struct drm_device *dev,
struct drm_file *file_priv, struct drm_file *file_priv,

View File

@ -137,7 +137,7 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
/* need to align pitch with crtc limits */ /* need to align pitch with crtc limits */
mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp, mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
fb_tiled); fb_tiled);
domain = amdgpu_display_framebuffer_domains(adev); domain = amdgpu_display_supported_domains(adev);
height = ALIGN(mode_cmd->height, 8); height = ALIGN(mode_cmd->height, 8);
size = mode_cmd->pitches[0] * height; size = mode_cmd->pitches[0] * height;

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@ -215,7 +215,7 @@ static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf,
struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv); struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
struct ttm_operation_ctx ctx = { true, false }; struct ttm_operation_ctx ctx = { true, false };
u32 domain = amdgpu_display_framebuffer_domains(adev); u32 domain = amdgpu_display_supported_domains(adev);
int ret; int ret;
bool reads = (direction == DMA_BIDIRECTIONAL || bool reads = (direction == DMA_BIDIRECTIONAL ||
direction == DMA_FROM_DEVICE); direction == DMA_FROM_DEVICE);

View File

@ -3049,12 +3049,11 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane,
return r; return r;
if (plane->type != DRM_PLANE_TYPE_CURSOR) if (plane->type != DRM_PLANE_TYPE_CURSOR)
domain = amdgpu_display_framebuffer_domains(adev); domain = amdgpu_display_supported_domains(adev);
else else
domain = AMDGPU_GEM_DOMAIN_VRAM; domain = AMDGPU_GEM_DOMAIN_VRAM;
r = amdgpu_bo_pin(rbo, domain, &afb->address); r = amdgpu_bo_pin(rbo, domain, &afb->address);
amdgpu_bo_unreserve(rbo); amdgpu_bo_unreserve(rbo);
if (unlikely(r != 0)) { if (unlikely(r != 0)) {