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drm/amdgpu: clean wptr on wb when gpu recovery
The TDR will be randomly failed due to compute ring test failure. If the compute ring wptr & 0x7ff(ring_buf_mask) is 0x100 then after map mqd the compute ring rptr will be synced with 0x100. And the ring test packet size is also 0x100. Then after invocation of amdgpu_ring_commit, the cp will not really handle the packet on the ring buffer because rptr is equal to wptr. Signed-off-by: Yintian Tao <yttao@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -3512,6 +3512,7 @@ static int gfx_v10_0_kcq_init_queue(struct amdgpu_ring *ring)
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/* reset ring buffer */
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ring->wptr = 0;
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atomic64_set((atomic64_t *)&adev->wb.wb[ring->wptr_offs], 0);
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amdgpu_ring_clear_ring(ring);
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} else {
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amdgpu_ring_clear_ring(ring);
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@ -3668,6 +3668,7 @@ static int gfx_v9_0_kcq_init_queue(struct amdgpu_ring *ring)
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/* reset ring buffer */
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ring->wptr = 0;
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atomic64_set((atomic64_t *)&adev->wb.wb[ring->wptr_offs], 0);
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amdgpu_ring_clear_ring(ring);
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} else {
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amdgpu_ring_clear_ring(ring);
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