mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-18 20:06:12 +07:00
IB/mthca: Give reserved MTTs a separate cache line
MTTs are allocated in non-cache-coherent memory, so we must give reserved MTTs their own cache line, to prevent both device and CPU from writing into the same cache line at the same time. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
This commit is contained in:
parent
c7d204e8fd
commit
1d1f19cfce
@ -464,6 +464,10 @@ static int mthca_init_icm(struct mthca_dev *mdev,
|
||||
goto err_unmap_aux;
|
||||
}
|
||||
|
||||
/* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */
|
||||
mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * MTHCA_MTT_SEG_SIZE,
|
||||
dma_get_cache_alignment()) / MTHCA_MTT_SEG_SIZE;
|
||||
|
||||
mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
|
||||
MTHCA_MTT_SEG_SIZE,
|
||||
mdev->limits.num_mtt_segs,
|
||||
|
Loading…
Reference in New Issue
Block a user