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drm/i915: Add Wa_1407352427:icl,ehl
The workaround database now indicates we need to disable psdunit clock gating as well. v3: - Rebase on top of other workarounds that have landed. - Restrict cc:stable tag to 5.2+ since that's when ICL was first officially supported. Bspec: 32354 Bspec: 33450 Bspec: 33451 Suggested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: stable@vger.kernel.org # v5.2+ Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191231190713.1549533-1-matthew.d.roper@intel.com
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@ -4183,6 +4183,7 @@ enum {
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#define UNSLICE_UNIT_LEVEL_CLKGATE2 _MMIO(0x94e4)
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#define VSUNIT_CLKGATE_DIS_TGL REG_BIT(19)
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#define PSDUNIT_CLKGATE_DIS REG_BIT(5)
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#define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560)
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#define CGPSF_CLKGATE_DIS (1 << 3)
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@ -6607,6 +6607,9 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
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intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE,
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0, VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
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/* Wa_1407352427:icl,ehl */
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intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
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0, PSDUNIT_CLKGATE_DIS);
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}
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static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
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