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usb: typec: driver for TI HD3SS3220 USB Type-C DRP port controller
Driver for TI HD3SS3220 USB Type-C DRP port controller. The driver currently registers the port and supports data role swapping. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Link: https://lore.kernel.org/r/1567584941-13690-3-git-send-email-biju.das@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -50,6 +50,16 @@ source "drivers/usb/typec/tcpm/Kconfig"
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source "drivers/usb/typec/ucsi/Kconfig"
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config TYPEC_HD3SS3220
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tristate "TI HD3SS3220 Type-C DRP Port controller driver"
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depends on I2C
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help
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Say Y or M here if your system has TI HD3SS3220 Type-C DRP Port
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controller driver.
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If you choose to build this driver as a dynamically linked module, the
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module will be called hd3ss3220.ko.
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config TYPEC_TPS6598X
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tristate "TI TPS6598x USB Power Delivery controller driver"
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depends on I2C
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@ -4,5 +4,6 @@ typec-y := class.o mux.o bus.o
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obj-$(CONFIG_TYPEC) += altmodes/
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obj-$(CONFIG_TYPEC_TCPM) += tcpm/
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obj-$(CONFIG_TYPEC_UCSI) += ucsi/
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obj-$(CONFIG_TYPEC_HD3SS3220) += hd3ss3220.o
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obj-$(CONFIG_TYPEC_TPS6598X) += tps6598x.o
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obj-$(CONFIG_TYPEC) += mux/
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259
drivers/usb/typec/hd3ss3220.c
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259
drivers/usb/typec/hd3ss3220.c
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@ -0,0 +1,259 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* TI HD3SS3220 Type-C DRP Port Controller Driver
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*
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* Copyright (C) 2019 Renesas Electronics Corp.
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*/
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <linux/usb/role.h>
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#include <linux/irqreturn.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/usb/typec.h>
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#include <linux/delay.h>
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#define HD3SS3220_REG_CN_STAT_CTRL 0x09
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#define HD3SS3220_REG_GEN_CTRL 0x0A
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#define HD3SS3220_REG_DEV_REV 0xA0
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/* Register HD3SS3220_REG_CN_STAT_CTRL*/
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#define HD3SS3220_REG_CN_STAT_CTRL_ATTACHED_STATE_MASK (BIT(7) | BIT(6))
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#define HD3SS3220_REG_CN_STAT_CTRL_AS_DFP BIT(6)
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#define HD3SS3220_REG_CN_STAT_CTRL_AS_UFP BIT(7)
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#define HD3SS3220_REG_CN_STAT_CTRL_TO_ACCESSORY (BIT(7) | BIT(6))
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#define HD3SS3220_REG_CN_STAT_CTRL_INT_STATUS BIT(4)
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/* Register HD3SS3220_REG_GEN_CTRL*/
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#define HD3SS3220_REG_GEN_CTRL_SRC_PREF_MASK (BIT(2) | BIT(1))
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#define HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_DEFAULT 0x00
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#define HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SNK BIT(1)
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#define HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SRC (BIT(2) | BIT(1))
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struct hd3ss3220 {
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struct device *dev;
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struct regmap *regmap;
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struct usb_role_switch *role_sw;
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struct typec_port *port;
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struct typec_capability typec_cap;
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};
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static int hd3ss3220_set_source_pref(struct hd3ss3220 *hd3ss3220, int src_pref)
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{
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return regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL,
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HD3SS3220_REG_GEN_CTRL_SRC_PREF_MASK,
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src_pref);
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}
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static enum usb_role hd3ss3220_get_attached_state(struct hd3ss3220 *hd3ss3220)
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{
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unsigned int reg_val;
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enum usb_role attached_state;
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int ret;
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ret = regmap_read(hd3ss3220->regmap, HD3SS3220_REG_CN_STAT_CTRL,
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®_val);
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if (ret < 0)
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return ret;
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switch (reg_val & HD3SS3220_REG_CN_STAT_CTRL_ATTACHED_STATE_MASK) {
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case HD3SS3220_REG_CN_STAT_CTRL_AS_DFP:
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attached_state = USB_ROLE_HOST;
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break;
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case HD3SS3220_REG_CN_STAT_CTRL_AS_UFP:
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attached_state = USB_ROLE_DEVICE;
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break;
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default:
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attached_state = USB_ROLE_NONE;
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break;
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}
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return attached_state;
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}
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static int hd3ss3220_dr_set(const struct typec_capability *cap,
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enum typec_data_role role)
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{
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struct hd3ss3220 *hd3ss3220 = container_of(cap, struct hd3ss3220,
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typec_cap);
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enum usb_role role_val;
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int pref, ret = 0;
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if (role == TYPEC_HOST) {
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role_val = USB_ROLE_HOST;
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pref = HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SRC;
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} else {
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role_val = USB_ROLE_DEVICE;
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pref = HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SNK;
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}
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ret = hd3ss3220_set_source_pref(hd3ss3220, pref);
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usleep_range(10, 100);
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usb_role_switch_set_role(hd3ss3220->role_sw, role_val);
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typec_set_data_role(hd3ss3220->port, role);
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return ret;
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}
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static void hd3ss3220_set_role(struct hd3ss3220 *hd3ss3220)
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{
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enum usb_role role_state = hd3ss3220_get_attached_state(hd3ss3220);
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usb_role_switch_set_role(hd3ss3220->role_sw, role_state);
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if (role_state == USB_ROLE_NONE)
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hd3ss3220_set_source_pref(hd3ss3220,
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HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_DEFAULT);
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switch (role_state) {
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case USB_ROLE_HOST:
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typec_set_data_role(hd3ss3220->port, TYPEC_HOST);
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break;
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case USB_ROLE_DEVICE:
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typec_set_data_role(hd3ss3220->port, TYPEC_DEVICE);
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break;
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default:
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break;
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}
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}
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irqreturn_t hd3ss3220_irq(struct hd3ss3220 *hd3ss3220)
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{
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int err;
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hd3ss3220_set_role(hd3ss3220);
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err = regmap_update_bits_base(hd3ss3220->regmap,
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HD3SS3220_REG_CN_STAT_CTRL,
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HD3SS3220_REG_CN_STAT_CTRL_INT_STATUS,
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HD3SS3220_REG_CN_STAT_CTRL_INT_STATUS,
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NULL, false, true);
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if (err < 0)
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return IRQ_NONE;
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return IRQ_HANDLED;
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}
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static irqreturn_t hd3ss3220_irq_handler(int irq, void *data)
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{
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struct i2c_client *client = to_i2c_client(data);
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struct hd3ss3220 *hd3ss3220 = i2c_get_clientdata(client);
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return hd3ss3220_irq(hd3ss3220);
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}
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static const struct regmap_config config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = 0x0A,
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};
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static int hd3ss3220_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct hd3ss3220 *hd3ss3220;
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struct fwnode_handle *connector;
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int ret;
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unsigned int data;
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hd3ss3220 = devm_kzalloc(&client->dev, sizeof(struct hd3ss3220),
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GFP_KERNEL);
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if (!hd3ss3220)
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return -ENOMEM;
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i2c_set_clientdata(client, hd3ss3220);
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hd3ss3220->dev = &client->dev;
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hd3ss3220->regmap = devm_regmap_init_i2c(client, &config);
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if (IS_ERR(hd3ss3220->regmap))
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return PTR_ERR(hd3ss3220->regmap);
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hd3ss3220_set_source_pref(hd3ss3220,
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HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_DEFAULT);
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connector = device_get_named_child_node(hd3ss3220->dev, "connector");
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if (IS_ERR(connector))
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return PTR_ERR(connector);
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hd3ss3220->role_sw = fwnode_usb_role_switch_get(connector);
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fwnode_handle_put(connector);
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if (IS_ERR_OR_NULL(hd3ss3220->role_sw))
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return PTR_ERR(hd3ss3220->role_sw);
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hd3ss3220->typec_cap.prefer_role = TYPEC_NO_PREFERRED_ROLE;
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hd3ss3220->typec_cap.dr_set = hd3ss3220_dr_set;
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hd3ss3220->typec_cap.type = TYPEC_PORT_DRP;
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hd3ss3220->typec_cap.data = TYPEC_PORT_DRD;
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hd3ss3220->port = typec_register_port(&client->dev,
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&hd3ss3220->typec_cap);
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if (IS_ERR(hd3ss3220->port))
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return PTR_ERR(hd3ss3220->port);
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hd3ss3220_set_role(hd3ss3220);
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ret = regmap_read(hd3ss3220->regmap, HD3SS3220_REG_CN_STAT_CTRL, &data);
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if (ret < 0)
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goto error;
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if (data & HD3SS3220_REG_CN_STAT_CTRL_INT_STATUS) {
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ret = regmap_write(hd3ss3220->regmap,
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HD3SS3220_REG_CN_STAT_CTRL,
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data | HD3SS3220_REG_CN_STAT_CTRL_INT_STATUS);
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if (ret < 0)
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goto error;
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}
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if (client->irq > 0) {
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ret = devm_request_threaded_irq(&client->dev, client->irq, NULL,
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hd3ss3220_irq_handler,
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IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
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"hd3ss3220", &client->dev);
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if (ret)
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goto error;
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}
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ret = i2c_smbus_read_byte_data(client, HD3SS3220_REG_DEV_REV);
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if (ret < 0)
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goto error;
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dev_info(&client->dev, "probed revision=0x%x\n", ret);
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return 0;
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error:
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typec_unregister_port(hd3ss3220->port);
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usb_role_switch_put(hd3ss3220->role_sw);
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return ret;
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}
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static int hd3ss3220_remove(struct i2c_client *client)
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{
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struct hd3ss3220 *hd3ss3220 = i2c_get_clientdata(client);
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typec_unregister_port(hd3ss3220->port);
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usb_role_switch_put(hd3ss3220->role_sw);
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return 0;
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}
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static const struct of_device_id dev_ids[] = {
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{ .compatible = "ti,hd3ss3220"},
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{}
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};
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MODULE_DEVICE_TABLE(of, dev_ids);
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static struct i2c_driver hd3ss3220_driver = {
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.driver = {
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.name = "hd3ss3220",
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.of_match_table = of_match_ptr(dev_ids),
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},
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.probe = hd3ss3220_probe,
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.remove = hd3ss3220_remove,
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};
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module_i2c_driver(hd3ss3220_driver);
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MODULE_AUTHOR("Biju Das <biju.das@bp.renesas.com>");
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MODULE_DESCRIPTION("TI HD3SS3220 DRP Port Controller Driver");
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MODULE_LICENSE("GPL");
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