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drm/amd/display: Expose configure_encoder for link_encoder
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -445,12 +445,11 @@ static uint8_t get_frontend_source(
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}
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}
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static void configure_encoder(
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void configure_encoder(
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struct dcn10_link_encoder *enc10,
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const struct dc_link_settings *link_settings)
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{
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/* set number of lanes */
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REG_SET(DP_CONFIG, 0,
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DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE);
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@ -271,6 +271,10 @@ void dcn10_link_encoder_setup(
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struct link_encoder *enc,
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enum signal_type signal);
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void configure_encoder(
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struct dcn10_link_encoder *enc10,
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const struct dc_link_settings *link_settings);
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/* enables TMDS PHY output */
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/* TODO: still need depth or just pass in adjusted pixel clock? */
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void dcn10_link_encoder_enable_tmds_output(
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