mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 00:26:42 +07:00
Merge branch 'mlxsw-cosmetics-plus-res-mgmt-rewrite'
Jiri Pirko says: ==================== mlxsw: Driver update Mostly cosmetics and small resource values management rewrite. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
1bac938141
@ -513,6 +513,11 @@ static inline int mlxsw_cmd_unmap_fa(struct mlxsw_core *mlxsw_core)
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* are no more sources in the table, will return resource id 0xFFF to indicate
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* are no more sources in the table, will return resource id 0xFFF to indicate
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* it.
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* it.
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*/
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*/
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#define MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID 0xffff
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#define MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES 100
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#define MLXSW_CMD_QUERY_RESOURCES_PER_QUERY 32
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static inline int mlxsw_cmd_query_resources(struct mlxsw_core *mlxsw_core,
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static inline int mlxsw_cmd_query_resources(struct mlxsw_core *mlxsw_core,
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char *out_mbox, int index)
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char *out_mbox, int index)
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{
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{
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@ -67,6 +67,7 @@
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#include "trap.h"
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#include "trap.h"
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#include "emad.h"
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#include "emad.h"
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#include "reg.h"
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#include "reg.h"
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#include "resources.h"
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static LIST_HEAD(mlxsw_core_driver_list);
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static LIST_HEAD(mlxsw_core_driver_list);
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static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
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static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
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@ -111,7 +112,7 @@ struct mlxsw_core {
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struct {
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struct {
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u8 *mapping; /* lag_id+port_index to local_port mapping */
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u8 *mapping; /* lag_id+port_index to local_port mapping */
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} lag;
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} lag;
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struct mlxsw_resources resources;
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struct mlxsw_res res;
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struct mlxsw_hwmon *hwmon;
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struct mlxsw_hwmon *hwmon;
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unsigned long driver_priv[0];
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unsigned long driver_priv[0];
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/* driver_priv has to be always the last item */
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/* driver_priv has to be always the last item */
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@ -1101,14 +1102,15 @@ int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
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}
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}
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err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile,
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err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile,
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&mlxsw_core->resources);
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&mlxsw_core->res);
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if (err)
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if (err)
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goto err_bus_init;
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goto err_bus_init;
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if (mlxsw_core->resources.max_lag_valid &&
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if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) &&
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mlxsw_core->resources.max_ports_in_lag_valid) {
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MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) {
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alloc_size = sizeof(u8) * mlxsw_core->resources.max_lag *
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alloc_size = sizeof(u8) *
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mlxsw_core->resources.max_ports_in_lag;
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MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) *
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MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS);
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mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
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mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
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if (!mlxsw_core->lag.mapping) {
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if (!mlxsw_core->lag.mapping) {
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err = -ENOMEM;
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err = -ENOMEM;
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@ -1615,7 +1617,7 @@ EXPORT_SYMBOL(mlxsw_core_skb_receive);
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static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
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static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
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u16 lag_id, u8 port_index)
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u16 lag_id, u8 port_index)
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{
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{
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return mlxsw_core->resources.max_ports_in_lag * lag_id +
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return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id +
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port_index;
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port_index;
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}
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}
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@ -1644,7 +1646,7 @@ void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
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{
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{
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int i;
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int i;
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for (i = 0; i < mlxsw_core->resources.max_ports_in_lag; i++) {
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for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) {
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int index = mlxsw_core_lag_mapping_index(mlxsw_core,
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int index = mlxsw_core_lag_mapping_index(mlxsw_core,
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lag_id, i);
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lag_id, i);
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@ -1654,11 +1656,19 @@ void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
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}
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}
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EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
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EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
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struct mlxsw_resources *mlxsw_core_resources_get(struct mlxsw_core *mlxsw_core)
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bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
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enum mlxsw_res_id res_id)
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{
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{
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return &mlxsw_core->resources;
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return mlxsw_res_valid(&mlxsw_core->res, res_id);
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}
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}
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EXPORT_SYMBOL(mlxsw_core_resources_get);
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EXPORT_SYMBOL(mlxsw_core_res_valid);
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u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
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enum mlxsw_res_id res_id)
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{
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return mlxsw_res_get(&mlxsw_core->res, res_id);
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}
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EXPORT_SYMBOL(mlxsw_core_res_get);
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int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core,
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int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core,
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struct mlxsw_core_port *mlxsw_core_port, u8 local_port,
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struct mlxsw_core_port *mlxsw_core_port, u8 local_port,
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@ -48,8 +48,8 @@
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#include "trap.h"
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#include "trap.h"
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#include "reg.h"
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#include "reg.h"
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#include "cmd.h"
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#include "cmd.h"
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#include "resources.h"
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#define MLXSW_MODULE_ALIAS_PREFIX "mlxsw-driver-"
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#define MLXSW_MODULE_ALIAS_PREFIX "mlxsw-driver-"
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#define MODULE_MLXSW_DRIVER_ALIAS(kind) \
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#define MODULE_MLXSW_DRIVER_ALIAS(kind) \
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@ -266,45 +266,23 @@ struct mlxsw_driver {
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const struct mlxsw_config_profile *profile;
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const struct mlxsw_config_profile *profile;
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};
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};
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struct mlxsw_resources {
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bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
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u32 max_span_valid:1,
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enum mlxsw_res_id res_id);
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max_lag_valid:1,
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max_ports_in_lag_valid:1,
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kvd_size_valid:1,
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kvd_single_min_size_valid:1,
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kvd_double_min_size_valid:1,
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max_virtual_routers_valid:1,
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max_system_ports_valid:1,
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max_vlan_groups_valid:1,
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max_regions_valid:1,
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max_rif_valid:1;
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u8 max_span;
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u8 max_lag;
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u8 max_ports_in_lag;
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u32 kvd_size;
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u32 kvd_single_min_size;
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u32 kvd_double_min_size;
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u16 max_virtual_routers;
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u16 max_system_ports;
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u16 max_vlan_groups;
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u16 max_regions;
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u16 max_rif;
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/* Internal resources.
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#define MLXSW_CORE_RES_VALID(res, short_res_id) \
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* Determined by the SW, not queried from the HW.
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mlxsw_core_res_valid(res, MLXSW_RES_ID_##short_res_id)
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*/
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u32 kvd_single_size;
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u32 kvd_double_size;
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u32 kvd_linear_size;
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};
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struct mlxsw_resources *mlxsw_core_resources_get(struct mlxsw_core *mlxsw_core);
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u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
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enum mlxsw_res_id res_id);
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#define MLXSW_CORE_RES_GET(res, short_res_id) \
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mlxsw_core_res_get(res, MLXSW_RES_ID_##short_res_id)
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struct mlxsw_bus {
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struct mlxsw_bus {
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const char *kind;
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const char *kind;
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int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
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int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
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const struct mlxsw_config_profile *profile,
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const struct mlxsw_config_profile *profile,
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struct mlxsw_resources *resources);
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struct mlxsw_res *res);
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void (*fini)(void *bus_priv);
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void (*fini)(void *bus_priv);
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bool (*skb_transmit_busy)(void *bus_priv,
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bool (*skb_transmit_busy)(void *bus_priv,
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const struct mlxsw_tx_info *tx_info);
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const struct mlxsw_tx_info *tx_info);
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@ -55,7 +55,7 @@ struct mlxsw_item {
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};
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};
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static inline unsigned int
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static inline unsigned int
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__mlxsw_item_offset(struct mlxsw_item *item, unsigned short index,
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__mlxsw_item_offset(const struct mlxsw_item *item, unsigned short index,
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size_t typesize)
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size_t typesize)
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{
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{
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BUG_ON(index && !item->step);
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BUG_ON(index && !item->step);
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@ -72,7 +72,8 @@ __mlxsw_item_offset(struct mlxsw_item *item, unsigned short index,
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typesize);
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typesize);
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}
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}
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static inline u16 __mlxsw_item_get16(char *buf, struct mlxsw_item *item,
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static inline u16 __mlxsw_item_get16(const char *buf,
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const struct mlxsw_item *item,
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unsigned short index)
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unsigned short index)
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{
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{
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unsigned int offset = __mlxsw_item_offset(item, index, sizeof(u16));
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unsigned int offset = __mlxsw_item_offset(item, index, sizeof(u16));
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@ -87,7 +88,7 @@ static inline u16 __mlxsw_item_get16(char *buf, struct mlxsw_item *item,
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return tmp;
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return tmp;
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}
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}
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static inline void __mlxsw_item_set16(char *buf, struct mlxsw_item *item,
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static inline void __mlxsw_item_set16(char *buf, const struct mlxsw_item *item,
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unsigned short index, u16 val)
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unsigned short index, u16 val)
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{
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{
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unsigned int offset = __mlxsw_item_offset(item, index,
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unsigned int offset = __mlxsw_item_offset(item, index,
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@ -105,7 +106,8 @@ static inline void __mlxsw_item_set16(char *buf, struct mlxsw_item *item,
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b[offset] = cpu_to_be16(tmp);
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b[offset] = cpu_to_be16(tmp);
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}
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}
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static inline u32 __mlxsw_item_get32(char *buf, struct mlxsw_item *item,
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static inline u32 __mlxsw_item_get32(const char *buf,
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const struct mlxsw_item *item,
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unsigned short index)
|
unsigned short index)
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{
|
{
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unsigned int offset = __mlxsw_item_offset(item, index, sizeof(u32));
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unsigned int offset = __mlxsw_item_offset(item, index, sizeof(u32));
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@ -120,7 +122,7 @@ static inline u32 __mlxsw_item_get32(char *buf, struct mlxsw_item *item,
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return tmp;
|
return tmp;
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}
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}
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|
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static inline void __mlxsw_item_set32(char *buf, struct mlxsw_item *item,
|
static inline void __mlxsw_item_set32(char *buf, const struct mlxsw_item *item,
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unsigned short index, u32 val)
|
unsigned short index, u32 val)
|
||||||
{
|
{
|
||||||
unsigned int offset = __mlxsw_item_offset(item, index,
|
unsigned int offset = __mlxsw_item_offset(item, index,
|
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@ -138,7 +140,8 @@ static inline void __mlxsw_item_set32(char *buf, struct mlxsw_item *item,
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b[offset] = cpu_to_be32(tmp);
|
b[offset] = cpu_to_be32(tmp);
|
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}
|
}
|
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|
|
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static inline u64 __mlxsw_item_get64(char *buf, struct mlxsw_item *item,
|
static inline u64 __mlxsw_item_get64(const char *buf,
|
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|
const struct mlxsw_item *item,
|
||||||
unsigned short index)
|
unsigned short index)
|
||||||
{
|
{
|
||||||
unsigned int offset = __mlxsw_item_offset(item, index, sizeof(u64));
|
unsigned int offset = __mlxsw_item_offset(item, index, sizeof(u64));
|
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@ -153,7 +156,7 @@ static inline u64 __mlxsw_item_get64(char *buf, struct mlxsw_item *item,
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return tmp;
|
return tmp;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void __mlxsw_item_set64(char *buf, struct mlxsw_item *item,
|
static inline void __mlxsw_item_set64(char *buf, const struct mlxsw_item *item,
|
||||||
unsigned short index, u64 val)
|
unsigned short index, u64 val)
|
||||||
{
|
{
|
||||||
unsigned int offset = __mlxsw_item_offset(item, index, sizeof(u64));
|
unsigned int offset = __mlxsw_item_offset(item, index, sizeof(u64));
|
||||||
@ -170,8 +173,8 @@ static inline void __mlxsw_item_set64(char *buf, struct mlxsw_item *item,
|
|||||||
b[offset] = cpu_to_be64(tmp);
|
b[offset] = cpu_to_be64(tmp);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void __mlxsw_item_memcpy_from(char *buf, char *dst,
|
static inline void __mlxsw_item_memcpy_from(const char *buf, char *dst,
|
||||||
struct mlxsw_item *item,
|
const struct mlxsw_item *item,
|
||||||
unsigned short index)
|
unsigned short index)
|
||||||
{
|
{
|
||||||
unsigned int offset = __mlxsw_item_offset(item, index, sizeof(char));
|
unsigned int offset = __mlxsw_item_offset(item, index, sizeof(char));
|
||||||
@ -180,7 +183,7 @@ static inline void __mlxsw_item_memcpy_from(char *buf, char *dst,
|
|||||||
}
|
}
|
||||||
|
|
||||||
static inline void __mlxsw_item_memcpy_to(char *buf, const char *src,
|
static inline void __mlxsw_item_memcpy_to(char *buf, const char *src,
|
||||||
struct mlxsw_item *item,
|
const struct mlxsw_item *item,
|
||||||
unsigned short index)
|
unsigned short index)
|
||||||
{
|
{
|
||||||
unsigned int offset = __mlxsw_item_offset(item, index, sizeof(char));
|
unsigned int offset = __mlxsw_item_offset(item, index, sizeof(char));
|
||||||
@ -189,7 +192,8 @@ static inline void __mlxsw_item_memcpy_to(char *buf, const char *src,
|
|||||||
}
|
}
|
||||||
|
|
||||||
static inline u16
|
static inline u16
|
||||||
__mlxsw_item_bit_array_offset(struct mlxsw_item *item, u16 index, u8 *shift)
|
__mlxsw_item_bit_array_offset(const struct mlxsw_item *item,
|
||||||
|
u16 index, u8 *shift)
|
||||||
{
|
{
|
||||||
u16 max_index, be_index;
|
u16 max_index, be_index;
|
||||||
u16 offset; /* byte offset inside the array */
|
u16 offset; /* byte offset inside the array */
|
||||||
@ -212,7 +216,8 @@ __mlxsw_item_bit_array_offset(struct mlxsw_item *item, u16 index, u8 *shift)
|
|||||||
return item->offset + offset;
|
return item->offset + offset;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline u8 __mlxsw_item_bit_array_get(char *buf, struct mlxsw_item *item,
|
static inline u8 __mlxsw_item_bit_array_get(const char *buf,
|
||||||
|
const struct mlxsw_item *item,
|
||||||
u16 index)
|
u16 index)
|
||||||
{
|
{
|
||||||
u8 shift, tmp;
|
u8 shift, tmp;
|
||||||
@ -224,7 +229,8 @@ static inline u8 __mlxsw_item_bit_array_get(char *buf, struct mlxsw_item *item,
|
|||||||
return tmp;
|
return tmp;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void __mlxsw_item_bit_array_set(char *buf, struct mlxsw_item *item,
|
static inline void __mlxsw_item_bit_array_set(char *buf,
|
||||||
|
const struct mlxsw_item *item,
|
||||||
u16 index, u8 val)
|
u16 index, u8 val)
|
||||||
{
|
{
|
||||||
u8 shift, tmp;
|
u8 shift, tmp;
|
||||||
@ -254,7 +260,7 @@ static struct mlxsw_item __ITEM_NAME(_type, _cname, _iname) = { \
|
|||||||
.size = {.bits = _sizebits,}, \
|
.size = {.bits = _sizebits,}, \
|
||||||
.name = #_type "_" #_cname "_" #_iname, \
|
.name = #_type "_" #_cname "_" #_iname, \
|
||||||
}; \
|
}; \
|
||||||
static inline u16 mlxsw_##_type##_##_cname##_##_iname##_get(char *buf) \
|
static inline u16 mlxsw_##_type##_##_cname##_##_iname##_get(const char *buf) \
|
||||||
{ \
|
{ \
|
||||||
return __mlxsw_item_get16(buf, &__ITEM_NAME(_type, _cname, _iname), 0); \
|
return __mlxsw_item_get16(buf, &__ITEM_NAME(_type, _cname, _iname), 0); \
|
||||||
} \
|
} \
|
||||||
@ -275,7 +281,7 @@ static struct mlxsw_item __ITEM_NAME(_type, _cname, _iname) = { \
|
|||||||
.name = #_type "_" #_cname "_" #_iname, \
|
.name = #_type "_" #_cname "_" #_iname, \
|
||||||
}; \
|
}; \
|
||||||
static inline u16 \
|
static inline u16 \
|
||||||
mlxsw_##_type##_##_cname##_##_iname##_get(char *buf, unsigned short index) \
|
mlxsw_##_type##_##_cname##_##_iname##_get(const char *buf, unsigned short index)\
|
||||||
{ \
|
{ \
|
||||||
return __mlxsw_item_get16(buf, &__ITEM_NAME(_type, _cname, _iname), \
|
return __mlxsw_item_get16(buf, &__ITEM_NAME(_type, _cname, _iname), \
|
||||||
index); \
|
index); \
|
||||||
@ -295,7 +301,7 @@ static struct mlxsw_item __ITEM_NAME(_type, _cname, _iname) = { \
|
|||||||
.size = {.bits = _sizebits,}, \
|
.size = {.bits = _sizebits,}, \
|
||||||
.name = #_type "_" #_cname "_" #_iname, \
|
.name = #_type "_" #_cname "_" #_iname, \
|
||||||
}; \
|
}; \
|
||||||
static inline u32 mlxsw_##_type##_##_cname##_##_iname##_get(char *buf) \
|
static inline u32 mlxsw_##_type##_##_cname##_##_iname##_get(const char *buf) \
|
||||||
{ \
|
{ \
|
||||||
return __mlxsw_item_get32(buf, &__ITEM_NAME(_type, _cname, _iname), 0); \
|
return __mlxsw_item_get32(buf, &__ITEM_NAME(_type, _cname, _iname), 0); \
|
||||||
} \
|
} \
|
||||||
@ -316,7 +322,7 @@ static struct mlxsw_item __ITEM_NAME(_type, _cname, _iname) = { \
|
|||||||
.name = #_type "_" #_cname "_" #_iname, \
|
.name = #_type "_" #_cname "_" #_iname, \
|
||||||
}; \
|
}; \
|
||||||
static inline u32 \
|
static inline u32 \
|
||||||
mlxsw_##_type##_##_cname##_##_iname##_get(char *buf, unsigned short index) \
|
mlxsw_##_type##_##_cname##_##_iname##_get(const char *buf, unsigned short index)\
|
||||||
{ \
|
{ \
|
||||||
return __mlxsw_item_get32(buf, &__ITEM_NAME(_type, _cname, _iname), \
|
return __mlxsw_item_get32(buf, &__ITEM_NAME(_type, _cname, _iname), \
|
||||||
index); \
|
index); \
|
||||||
@ -336,7 +342,7 @@ static struct mlxsw_item __ITEM_NAME(_type, _cname, _iname) = { \
|
|||||||
.size = {.bits = _sizebits,}, \
|
.size = {.bits = _sizebits,}, \
|
||||||
.name = #_type "_" #_cname "_" #_iname, \
|
.name = #_type "_" #_cname "_" #_iname, \
|
||||||
}; \
|
}; \
|
||||||
static inline u64 mlxsw_##_type##_##_cname##_##_iname##_get(char *buf) \
|
static inline u64 mlxsw_##_type##_##_cname##_##_iname##_get(const char *buf) \
|
||||||
{ \
|
{ \
|
||||||
return __mlxsw_item_get64(buf, &__ITEM_NAME(_type, _cname, _iname), 0); \
|
return __mlxsw_item_get64(buf, &__ITEM_NAME(_type, _cname, _iname), 0); \
|
||||||
} \
|
} \
|
||||||
@ -357,7 +363,7 @@ static struct mlxsw_item __ITEM_NAME(_type, _cname, _iname) = { \
|
|||||||
.name = #_type "_" #_cname "_" #_iname, \
|
.name = #_type "_" #_cname "_" #_iname, \
|
||||||
}; \
|
}; \
|
||||||
static inline u64 \
|
static inline u64 \
|
||||||
mlxsw_##_type##_##_cname##_##_iname##_get(char *buf, unsigned short index) \
|
mlxsw_##_type##_##_cname##_##_iname##_get(const char *buf, unsigned short index)\
|
||||||
{ \
|
{ \
|
||||||
return __mlxsw_item_get64(buf, &__ITEM_NAME(_type, _cname, _iname), \
|
return __mlxsw_item_get64(buf, &__ITEM_NAME(_type, _cname, _iname), \
|
||||||
index); \
|
index); \
|
||||||
@ -377,7 +383,7 @@ static struct mlxsw_item __ITEM_NAME(_type, _cname, _iname) = { \
|
|||||||
.name = #_type "_" #_cname "_" #_iname, \
|
.name = #_type "_" #_cname "_" #_iname, \
|
||||||
}; \
|
}; \
|
||||||
static inline void \
|
static inline void \
|
||||||
mlxsw_##_type##_##_cname##_##_iname##_memcpy_from(char *buf, char *dst) \
|
mlxsw_##_type##_##_cname##_##_iname##_memcpy_from(const char *buf, char *dst) \
|
||||||
{ \
|
{ \
|
||||||
__mlxsw_item_memcpy_from(buf, dst, \
|
__mlxsw_item_memcpy_from(buf, dst, \
|
||||||
&__ITEM_NAME(_type, _cname, _iname), 0); \
|
&__ITEM_NAME(_type, _cname, _iname), 0); \
|
||||||
@ -399,7 +405,7 @@ static struct mlxsw_item __ITEM_NAME(_type, _cname, _iname) = { \
|
|||||||
.name = #_type "_" #_cname "_" #_iname, \
|
.name = #_type "_" #_cname "_" #_iname, \
|
||||||
}; \
|
}; \
|
||||||
static inline void \
|
static inline void \
|
||||||
mlxsw_##_type##_##_cname##_##_iname##_memcpy_from(char *buf, \
|
mlxsw_##_type##_##_cname##_##_iname##_memcpy_from(const char *buf, \
|
||||||
unsigned short index, \
|
unsigned short index, \
|
||||||
char *dst) \
|
char *dst) \
|
||||||
{ \
|
{ \
|
||||||
@ -424,7 +430,7 @@ static struct mlxsw_item __ITEM_NAME(_type, _cname, _iname) = { \
|
|||||||
.name = #_type "_" #_cname "_" #_iname, \
|
.name = #_type "_" #_cname "_" #_iname, \
|
||||||
}; \
|
}; \
|
||||||
static inline u8 \
|
static inline u8 \
|
||||||
mlxsw_##_type##_##_cname##_##_iname##_get(char *buf, u16 index) \
|
mlxsw_##_type##_##_cname##_##_iname##_get(const char *buf, u16 index) \
|
||||||
{ \
|
{ \
|
||||||
return __mlxsw_item_bit_array_get(buf, \
|
return __mlxsw_item_bit_array_get(buf, \
|
||||||
&__ITEM_NAME(_type, _cname, _iname), \
|
&__ITEM_NAME(_type, _cname, _iname), \
|
||||||
|
@ -52,6 +52,7 @@
|
|||||||
#include "core.h"
|
#include "core.h"
|
||||||
#include "cmd.h"
|
#include "cmd.h"
|
||||||
#include "port.h"
|
#include "port.h"
|
||||||
|
#include "resources.h"
|
||||||
|
|
||||||
static const char mlxsw_pci_driver_name[] = "mlxsw_pci";
|
static const char mlxsw_pci_driver_name[] = "mlxsw_pci";
|
||||||
|
|
||||||
@ -238,8 +239,9 @@ static bool mlxsw_pci_elem_hw_owned(struct mlxsw_pci_queue *q, bool owner_bit)
|
|||||||
return owner_bit != !!(q->consumer_counter & q->count);
|
return owner_bit != !!(q->consumer_counter & q->count);
|
||||||
}
|
}
|
||||||
|
|
||||||
static char *mlxsw_pci_queue_sw_elem_get(struct mlxsw_pci_queue *q,
|
static char *
|
||||||
u32 (*get_elem_owner_func)(char *))
|
mlxsw_pci_queue_sw_elem_get(struct mlxsw_pci_queue *q,
|
||||||
|
u32 (*get_elem_owner_func)(const char *))
|
||||||
{
|
{
|
||||||
struct mlxsw_pci_queue_elem_info *elem_info;
|
struct mlxsw_pci_queue_elem_info *elem_info;
|
||||||
char *elem;
|
char *elem;
|
||||||
@ -1154,76 +1156,8 @@ mlxsw_pci_config_profile_swid_config(struct mlxsw_pci *mlxsw_pci,
|
|||||||
mlxsw_cmd_mbox_config_profile_swid_config_mask_set(mbox, index, mask);
|
mlxsw_cmd_mbox_config_profile_swid_config_mask_set(mbox, index, mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
#define MLXSW_RESOURCES_TABLE_END_ID 0xffff
|
|
||||||
#define MLXSW_MAX_SPAN_ID 0x2420
|
|
||||||
#define MLXSW_MAX_LAG_ID 0x2520
|
|
||||||
#define MLXSW_MAX_PORTS_IN_LAG_ID 0x2521
|
|
||||||
#define MLXSW_KVD_SIZE_ID 0x1001
|
|
||||||
#define MLXSW_KVD_SINGLE_MIN_SIZE_ID 0x1002
|
|
||||||
#define MLXSW_KVD_DOUBLE_MIN_SIZE_ID 0x1003
|
|
||||||
#define MLXSW_MAX_VIRTUAL_ROUTERS_ID 0x2C01
|
|
||||||
#define MLXSW_MAX_SYSTEM_PORT_ID 0x2502
|
|
||||||
#define MLXSW_MAX_VLAN_GROUPS_ID 0x2906
|
|
||||||
#define MLXSW_MAX_REGIONS_ID 0x2901
|
|
||||||
#define MLXSW_MAX_RIF_ID 0x2C02
|
|
||||||
#define MLXSW_RESOURCES_QUERY_MAX_QUERIES 100
|
|
||||||
#define MLXSW_RESOURCES_PER_QUERY 32
|
|
||||||
|
|
||||||
static void mlxsw_pci_resources_query_parse(int id, u64 val,
|
|
||||||
struct mlxsw_resources *resources)
|
|
||||||
{
|
|
||||||
switch (id) {
|
|
||||||
case MLXSW_MAX_SPAN_ID:
|
|
||||||
resources->max_span = val;
|
|
||||||
resources->max_span_valid = 1;
|
|
||||||
break;
|
|
||||||
case MLXSW_MAX_LAG_ID:
|
|
||||||
resources->max_lag = val;
|
|
||||||
resources->max_lag_valid = 1;
|
|
||||||
break;
|
|
||||||
case MLXSW_MAX_PORTS_IN_LAG_ID:
|
|
||||||
resources->max_ports_in_lag = val;
|
|
||||||
resources->max_ports_in_lag_valid = 1;
|
|
||||||
break;
|
|
||||||
case MLXSW_KVD_SIZE_ID:
|
|
||||||
resources->kvd_size = val;
|
|
||||||
resources->kvd_size_valid = 1;
|
|
||||||
break;
|
|
||||||
case MLXSW_KVD_SINGLE_MIN_SIZE_ID:
|
|
||||||
resources->kvd_single_min_size = val;
|
|
||||||
resources->kvd_single_min_size_valid = 1;
|
|
||||||
break;
|
|
||||||
case MLXSW_KVD_DOUBLE_MIN_SIZE_ID:
|
|
||||||
resources->kvd_double_min_size = val;
|
|
||||||
resources->kvd_double_min_size_valid = 1;
|
|
||||||
break;
|
|
||||||
case MLXSW_MAX_VIRTUAL_ROUTERS_ID:
|
|
||||||
resources->max_virtual_routers = val;
|
|
||||||
resources->max_virtual_routers_valid = 1;
|
|
||||||
break;
|
|
||||||
case MLXSW_MAX_SYSTEM_PORT_ID:
|
|
||||||
resources->max_system_ports = val;
|
|
||||||
resources->max_system_ports_valid = 1;
|
|
||||||
break;
|
|
||||||
case MLXSW_MAX_VLAN_GROUPS_ID:
|
|
||||||
resources->max_vlan_groups = val;
|
|
||||||
resources->max_vlan_groups_valid = 1;
|
|
||||||
break;
|
|
||||||
case MLXSW_MAX_REGIONS_ID:
|
|
||||||
resources->max_regions = val;
|
|
||||||
resources->max_regions_valid = 1;
|
|
||||||
break;
|
|
||||||
case MLXSW_MAX_RIF_ID:
|
|
||||||
resources->max_rif = val;
|
|
||||||
resources->max_rif_valid = 1;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static int mlxsw_pci_resources_query(struct mlxsw_pci *mlxsw_pci, char *mbox,
|
static int mlxsw_pci_resources_query(struct mlxsw_pci *mlxsw_pci, char *mbox,
|
||||||
struct mlxsw_resources *resources,
|
struct mlxsw_res *res,
|
||||||
u8 query_enabled)
|
u8 query_enabled)
|
||||||
{
|
{
|
||||||
int index, i;
|
int index, i;
|
||||||
@ -1237,19 +1171,20 @@ static int mlxsw_pci_resources_query(struct mlxsw_pci *mlxsw_pci, char *mbox,
|
|||||||
|
|
||||||
mlxsw_cmd_mbox_zero(mbox);
|
mlxsw_cmd_mbox_zero(mbox);
|
||||||
|
|
||||||
for (index = 0; index < MLXSW_RESOURCES_QUERY_MAX_QUERIES; index++) {
|
for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES;
|
||||||
|
index++) {
|
||||||
err = mlxsw_cmd_query_resources(mlxsw_pci->core, mbox, index);
|
err = mlxsw_cmd_query_resources(mlxsw_pci->core, mbox, index);
|
||||||
if (err)
|
if (err)
|
||||||
return err;
|
return err;
|
||||||
|
|
||||||
for (i = 0; i < MLXSW_RESOURCES_PER_QUERY; i++) {
|
for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) {
|
||||||
id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i);
|
id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i);
|
||||||
data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i);
|
data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i);
|
||||||
|
|
||||||
if (id == MLXSW_RESOURCES_TABLE_END_ID)
|
if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
mlxsw_pci_resources_query_parse(id, data, resources);
|
mlxsw_res_parse(res, id, data);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1259,13 +1194,14 @@ static int mlxsw_pci_resources_query(struct mlxsw_pci *mlxsw_pci, char *mbox,
|
|||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int mlxsw_pci_profile_get_kvd_sizes(const struct mlxsw_config_profile *profile,
|
static int
|
||||||
struct mlxsw_resources *resources)
|
mlxsw_pci_profile_get_kvd_sizes(const struct mlxsw_config_profile *profile,
|
||||||
|
struct mlxsw_res *res)
|
||||||
{
|
{
|
||||||
u32 singles_size, doubles_size, linear_size;
|
u32 single_size, double_size, linear_size;
|
||||||
|
|
||||||
if (!resources->kvd_single_min_size_valid ||
|
if (!MLXSW_RES_VALID(res, KVD_SINGLE_MIN_SIZE) ||
|
||||||
!resources->kvd_double_min_size_valid ||
|
!MLXSW_RES_VALID(res, KVD_DOUBLE_MIN_SIZE) ||
|
||||||
!profile->used_kvd_split_data)
|
!profile->used_kvd_split_data)
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
|
||||||
@ -1277,31 +1213,31 @@ static int mlxsw_pci_profile_get_kvd_sizes(const struct mlxsw_config_profile *pr
|
|||||||
* Both sizes must be a multiplications of the
|
* Both sizes must be a multiplications of the
|
||||||
* granularity from the profile.
|
* granularity from the profile.
|
||||||
*/
|
*/
|
||||||
doubles_size = (resources->kvd_size - linear_size);
|
double_size = MLXSW_RES_GET(res, KVD_SIZE) - linear_size;
|
||||||
doubles_size *= profile->kvd_hash_double_parts;
|
double_size *= profile->kvd_hash_double_parts;
|
||||||
doubles_size /= (profile->kvd_hash_double_parts +
|
double_size /= profile->kvd_hash_double_parts +
|
||||||
profile->kvd_hash_single_parts);
|
profile->kvd_hash_single_parts;
|
||||||
doubles_size /= profile->kvd_hash_granularity;
|
double_size /= profile->kvd_hash_granularity;
|
||||||
doubles_size *= profile->kvd_hash_granularity;
|
double_size *= profile->kvd_hash_granularity;
|
||||||
singles_size = resources->kvd_size - doubles_size -
|
single_size = MLXSW_RES_GET(res, KVD_SIZE) - double_size -
|
||||||
linear_size;
|
linear_size;
|
||||||
|
|
||||||
/* Check results are legal. */
|
/* Check results are legal. */
|
||||||
if (singles_size < resources->kvd_single_min_size ||
|
if (single_size < MLXSW_RES_GET(res, KVD_SINGLE_MIN_SIZE) ||
|
||||||
doubles_size < resources->kvd_double_min_size ||
|
double_size < MLXSW_RES_GET(res, KVD_DOUBLE_MIN_SIZE) ||
|
||||||
resources->kvd_size < linear_size)
|
MLXSW_RES_GET(res, KVD_SIZE) < linear_size)
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
|
||||||
resources->kvd_single_size = singles_size;
|
MLXSW_RES_SET(res, KVD_SINGLE_SIZE, single_size);
|
||||||
resources->kvd_double_size = doubles_size;
|
MLXSW_RES_SET(res, KVD_DOUBLE_SIZE, double_size);
|
||||||
resources->kvd_linear_size = linear_size;
|
MLXSW_RES_SET(res, KVD_LINEAR_SIZE, linear_size);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox,
|
static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox,
|
||||||
const struct mlxsw_config_profile *profile,
|
const struct mlxsw_config_profile *profile,
|
||||||
struct mlxsw_resources *resources)
|
struct mlxsw_res *res)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
int err;
|
int err;
|
||||||
@ -1390,22 +1326,22 @@ static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox,
|
|||||||
mlxsw_cmd_mbox_config_profile_adaptive_routing_group_cap_set(
|
mlxsw_cmd_mbox_config_profile_adaptive_routing_group_cap_set(
|
||||||
mbox, profile->adaptive_routing_group_cap);
|
mbox, profile->adaptive_routing_group_cap);
|
||||||
}
|
}
|
||||||
if (resources->kvd_size_valid) {
|
if (MLXSW_RES_VALID(res, KVD_SIZE)) {
|
||||||
err = mlxsw_pci_profile_get_kvd_sizes(profile, resources);
|
err = mlxsw_pci_profile_get_kvd_sizes(profile, res);
|
||||||
if (err)
|
if (err)
|
||||||
return err;
|
return err;
|
||||||
|
|
||||||
mlxsw_cmd_mbox_config_profile_set_kvd_linear_size_set(mbox, 1);
|
mlxsw_cmd_mbox_config_profile_set_kvd_linear_size_set(mbox, 1);
|
||||||
mlxsw_cmd_mbox_config_profile_kvd_linear_size_set(mbox,
|
mlxsw_cmd_mbox_config_profile_kvd_linear_size_set(mbox,
|
||||||
resources->kvd_linear_size);
|
MLXSW_RES_GET(res, KVD_LINEAR_SIZE));
|
||||||
mlxsw_cmd_mbox_config_profile_set_kvd_hash_single_size_set(mbox,
|
mlxsw_cmd_mbox_config_profile_set_kvd_hash_single_size_set(mbox,
|
||||||
1);
|
1);
|
||||||
mlxsw_cmd_mbox_config_profile_kvd_hash_single_size_set(mbox,
|
mlxsw_cmd_mbox_config_profile_kvd_hash_single_size_set(mbox,
|
||||||
resources->kvd_single_size);
|
MLXSW_RES_GET(res, KVD_SINGLE_SIZE));
|
||||||
mlxsw_cmd_mbox_config_profile_set_kvd_hash_double_size_set(
|
mlxsw_cmd_mbox_config_profile_set_kvd_hash_double_size_set(
|
||||||
mbox, 1);
|
mbox, 1);
|
||||||
mlxsw_cmd_mbox_config_profile_kvd_hash_double_size_set(mbox,
|
mlxsw_cmd_mbox_config_profile_kvd_hash_double_size_set(mbox,
|
||||||
resources->kvd_double_size);
|
MLXSW_RES_GET(res, KVD_DOUBLE_SIZE));
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i = 0; i < MLXSW_CONFIG_PROFILE_SWID_COUNT; i++)
|
for (i = 0; i < MLXSW_CONFIG_PROFILE_SWID_COUNT; i++)
|
||||||
@ -1543,7 +1479,7 @@ static void mlxsw_pci_mbox_free(struct mlxsw_pci *mlxsw_pci,
|
|||||||
|
|
||||||
static int mlxsw_pci_init(void *bus_priv, struct mlxsw_core *mlxsw_core,
|
static int mlxsw_pci_init(void *bus_priv, struct mlxsw_core *mlxsw_core,
|
||||||
const struct mlxsw_config_profile *profile,
|
const struct mlxsw_config_profile *profile,
|
||||||
struct mlxsw_resources *resources)
|
struct mlxsw_res *res)
|
||||||
{
|
{
|
||||||
struct mlxsw_pci *mlxsw_pci = bus_priv;
|
struct mlxsw_pci *mlxsw_pci = bus_priv;
|
||||||
struct pci_dev *pdev = mlxsw_pci->pdev;
|
struct pci_dev *pdev = mlxsw_pci->pdev;
|
||||||
@ -1602,12 +1538,12 @@ static int mlxsw_pci_init(void *bus_priv, struct mlxsw_core *mlxsw_core,
|
|||||||
if (err)
|
if (err)
|
||||||
goto err_boardinfo;
|
goto err_boardinfo;
|
||||||
|
|
||||||
err = mlxsw_pci_resources_query(mlxsw_pci, mbox, resources,
|
err = mlxsw_pci_resources_query(mlxsw_pci, mbox, res,
|
||||||
profile->resource_query_enable);
|
profile->resource_query_enable);
|
||||||
if (err)
|
if (err)
|
||||||
goto err_query_resources;
|
goto err_query_resources;
|
||||||
|
|
||||||
err = mlxsw_pci_config_profile(mlxsw_pci, mbox, profile, resources);
|
err = mlxsw_pci_config_profile(mlxsw_pci, mbox, profile, res);
|
||||||
if (err)
|
if (err)
|
||||||
goto err_config_profile;
|
goto err_config_profile;
|
||||||
|
|
||||||
|
@ -48,8 +48,16 @@
|
|||||||
struct mlxsw_reg_info {
|
struct mlxsw_reg_info {
|
||||||
u16 id;
|
u16 id;
|
||||||
u16 len; /* In u8 */
|
u16 len; /* In u8 */
|
||||||
|
const char *name;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
#define MLXSW_REG_DEFINE(_name, _id, _len) \
|
||||||
|
static const struct mlxsw_reg_info mlxsw_reg_##_name = { \
|
||||||
|
.id = _id, \
|
||||||
|
.len = _len, \
|
||||||
|
.name = #_name, \
|
||||||
|
}
|
||||||
|
|
||||||
#define MLXSW_REG(type) (&mlxsw_reg_##type)
|
#define MLXSW_REG(type) (&mlxsw_reg_##type)
|
||||||
#define MLXSW_REG_LEN(type) MLXSW_REG(type)->len
|
#define MLXSW_REG_LEN(type) MLXSW_REG(type)->len
|
||||||
#define MLXSW_REG_ZERO(type, payload) memset(payload, 0, MLXSW_REG(type)->len)
|
#define MLXSW_REG_ZERO(type, payload) memset(payload, 0, MLXSW_REG(type)->len)
|
||||||
@ -61,10 +69,7 @@ struct mlxsw_reg_info {
|
|||||||
#define MLXSW_REG_SGCR_ID 0x2000
|
#define MLXSW_REG_SGCR_ID 0x2000
|
||||||
#define MLXSW_REG_SGCR_LEN 0x10
|
#define MLXSW_REG_SGCR_LEN 0x10
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sgcr = {
|
MLXSW_REG_DEFINE(sgcr, MLXSW_REG_SGCR_ID, MLXSW_REG_SGCR_LEN);
|
||||||
.id = MLXSW_REG_SGCR_ID,
|
|
||||||
.len = MLXSW_REG_SGCR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_sgcr_llb
|
/* reg_sgcr_llb
|
||||||
* Link Local Broadcast (Default=0)
|
* Link Local Broadcast (Default=0)
|
||||||
@ -87,10 +92,7 @@ static inline void mlxsw_reg_sgcr_pack(char *payload, bool llb)
|
|||||||
#define MLXSW_REG_SPAD_ID 0x2002
|
#define MLXSW_REG_SPAD_ID 0x2002
|
||||||
#define MLXSW_REG_SPAD_LEN 0x10
|
#define MLXSW_REG_SPAD_LEN 0x10
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_spad = {
|
MLXSW_REG_DEFINE(spad, MLXSW_REG_SPAD_ID, MLXSW_REG_SPAD_LEN);
|
||||||
.id = MLXSW_REG_SPAD_ID,
|
|
||||||
.len = MLXSW_REG_SPAD_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_spad_base_mac
|
/* reg_spad_base_mac
|
||||||
* Base MAC address for the switch partitions.
|
* Base MAC address for the switch partitions.
|
||||||
@ -109,10 +111,7 @@ MLXSW_ITEM_BUF(reg, spad, base_mac, 0x02, 6);
|
|||||||
#define MLXSW_REG_SMID_ID 0x2007
|
#define MLXSW_REG_SMID_ID 0x2007
|
||||||
#define MLXSW_REG_SMID_LEN 0x240
|
#define MLXSW_REG_SMID_LEN 0x240
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_smid = {
|
MLXSW_REG_DEFINE(smid, MLXSW_REG_SMID_ID, MLXSW_REG_SMID_LEN);
|
||||||
.id = MLXSW_REG_SMID_ID,
|
|
||||||
.len = MLXSW_REG_SMID_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_smid_swid
|
/* reg_smid_swid
|
||||||
* Switch partition ID.
|
* Switch partition ID.
|
||||||
@ -156,10 +155,7 @@ static inline void mlxsw_reg_smid_pack(char *payload, u16 mid,
|
|||||||
#define MLXSW_REG_SSPR_ID 0x2008
|
#define MLXSW_REG_SSPR_ID 0x2008
|
||||||
#define MLXSW_REG_SSPR_LEN 0x8
|
#define MLXSW_REG_SSPR_LEN 0x8
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sspr = {
|
MLXSW_REG_DEFINE(sspr, MLXSW_REG_SSPR_ID, MLXSW_REG_SSPR_LEN);
|
||||||
.id = MLXSW_REG_SSPR_ID,
|
|
||||||
.len = MLXSW_REG_SSPR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_sspr_m
|
/* reg_sspr_m
|
||||||
* Master - if set, then the record describes the master system port.
|
* Master - if set, then the record describes the master system port.
|
||||||
@ -215,10 +211,7 @@ static inline void mlxsw_reg_sspr_pack(char *payload, u8 local_port)
|
|||||||
#define MLXSW_REG_SFDAT_ID 0x2009
|
#define MLXSW_REG_SFDAT_ID 0x2009
|
||||||
#define MLXSW_REG_SFDAT_LEN 0x8
|
#define MLXSW_REG_SFDAT_LEN 0x8
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sfdat = {
|
MLXSW_REG_DEFINE(sfdat, MLXSW_REG_SFDAT_ID, MLXSW_REG_SFDAT_LEN);
|
||||||
.id = MLXSW_REG_SFDAT_ID,
|
|
||||||
.len = MLXSW_REG_SFDAT_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_sfdat_swid
|
/* reg_sfdat_swid
|
||||||
* Switch partition ID.
|
* Switch partition ID.
|
||||||
@ -256,10 +249,7 @@ static inline void mlxsw_reg_sfdat_pack(char *payload, u32 age_time)
|
|||||||
#define MLXSW_REG_SFD_LEN (MLXSW_REG_SFD_BASE_LEN + \
|
#define MLXSW_REG_SFD_LEN (MLXSW_REG_SFD_BASE_LEN + \
|
||||||
MLXSW_REG_SFD_REC_LEN * MLXSW_REG_SFD_REC_MAX_COUNT)
|
MLXSW_REG_SFD_REC_LEN * MLXSW_REG_SFD_REC_MAX_COUNT)
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sfd = {
|
MLXSW_REG_DEFINE(sfd, MLXSW_REG_SFD_ID, MLXSW_REG_SFD_LEN);
|
||||||
.id = MLXSW_REG_SFD_ID,
|
|
||||||
.len = MLXSW_REG_SFD_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_sfd_swid
|
/* reg_sfd_swid
|
||||||
* Switch partition ID for queries. Reserved on Write.
|
* Switch partition ID for queries. Reserved on Write.
|
||||||
@ -580,10 +570,7 @@ mlxsw_reg_sfd_mc_pack(char *payload, int rec_index,
|
|||||||
#define MLXSW_REG_SFN_LEN (MLXSW_REG_SFN_BASE_LEN + \
|
#define MLXSW_REG_SFN_LEN (MLXSW_REG_SFN_BASE_LEN + \
|
||||||
MLXSW_REG_SFN_REC_LEN * MLXSW_REG_SFN_REC_MAX_COUNT)
|
MLXSW_REG_SFN_REC_LEN * MLXSW_REG_SFN_REC_MAX_COUNT)
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sfn = {
|
MLXSW_REG_DEFINE(sfn, MLXSW_REG_SFN_ID, MLXSW_REG_SFN_LEN);
|
||||||
.id = MLXSW_REG_SFN_ID,
|
|
||||||
.len = MLXSW_REG_SFN_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_sfn_swid
|
/* reg_sfn_swid
|
||||||
* Switch partition ID.
|
* Switch partition ID.
|
||||||
@ -701,10 +688,7 @@ static inline void mlxsw_reg_sfn_mac_lag_unpack(char *payload, int rec_index,
|
|||||||
#define MLXSW_REG_SPMS_ID 0x200D
|
#define MLXSW_REG_SPMS_ID 0x200D
|
||||||
#define MLXSW_REG_SPMS_LEN 0x404
|
#define MLXSW_REG_SPMS_LEN 0x404
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_spms = {
|
MLXSW_REG_DEFINE(spms, MLXSW_REG_SPMS_ID, MLXSW_REG_SPMS_LEN);
|
||||||
.id = MLXSW_REG_SPMS_ID,
|
|
||||||
.len = MLXSW_REG_SPMS_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_spms_local_port
|
/* reg_spms_local_port
|
||||||
* Local port number.
|
* Local port number.
|
||||||
@ -748,10 +732,7 @@ static inline void mlxsw_reg_spms_vid_pack(char *payload, u16 vid,
|
|||||||
#define MLXSW_REG_SPVID_ID 0x200E
|
#define MLXSW_REG_SPVID_ID 0x200E
|
||||||
#define MLXSW_REG_SPVID_LEN 0x08
|
#define MLXSW_REG_SPVID_LEN 0x08
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_spvid = {
|
MLXSW_REG_DEFINE(spvid, MLXSW_REG_SPVID_ID, MLXSW_REG_SPVID_LEN);
|
||||||
.id = MLXSW_REG_SPVID_ID,
|
|
||||||
.len = MLXSW_REG_SPVID_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_spvid_local_port
|
/* reg_spvid_local_port
|
||||||
* Local port number.
|
* Local port number.
|
||||||
@ -792,10 +773,7 @@ static inline void mlxsw_reg_spvid_pack(char *payload, u8 local_port, u16 pvid)
|
|||||||
#define MLXSW_REG_SPVM_LEN (MLXSW_REG_SPVM_BASE_LEN + \
|
#define MLXSW_REG_SPVM_LEN (MLXSW_REG_SPVM_BASE_LEN + \
|
||||||
MLXSW_REG_SPVM_REC_LEN * MLXSW_REG_SPVM_REC_MAX_COUNT)
|
MLXSW_REG_SPVM_REC_LEN * MLXSW_REG_SPVM_REC_MAX_COUNT)
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_spvm = {
|
MLXSW_REG_DEFINE(spvm, MLXSW_REG_SPVM_ID, MLXSW_REG_SPVM_LEN);
|
||||||
.id = MLXSW_REG_SPVM_ID,
|
|
||||||
.len = MLXSW_REG_SPVM_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_spvm_pt
|
/* reg_spvm_pt
|
||||||
* Priority tagged. If this bit is set, packets forwarded to the port with
|
* Priority tagged. If this bit is set, packets forwarded to the port with
|
||||||
@ -891,10 +869,7 @@ static inline void mlxsw_reg_spvm_pack(char *payload, u8 local_port,
|
|||||||
#define MLXSW_REG_SPAFT_ID 0x2010
|
#define MLXSW_REG_SPAFT_ID 0x2010
|
||||||
#define MLXSW_REG_SPAFT_LEN 0x08
|
#define MLXSW_REG_SPAFT_LEN 0x08
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_spaft = {
|
MLXSW_REG_DEFINE(spaft, MLXSW_REG_SPAFT_ID, MLXSW_REG_SPAFT_LEN);
|
||||||
.id = MLXSW_REG_SPAFT_ID,
|
|
||||||
.len = MLXSW_REG_SPAFT_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_spaft_local_port
|
/* reg_spaft_local_port
|
||||||
* Local port number.
|
* Local port number.
|
||||||
@ -947,10 +922,7 @@ static inline void mlxsw_reg_spaft_pack(char *payload, u8 local_port,
|
|||||||
#define MLXSW_REG_SFGC_ID 0x2011
|
#define MLXSW_REG_SFGC_ID 0x2011
|
||||||
#define MLXSW_REG_SFGC_LEN 0x10
|
#define MLXSW_REG_SFGC_LEN 0x10
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sfgc = {
|
MLXSW_REG_DEFINE(sfgc, MLXSW_REG_SFGC_ID, MLXSW_REG_SFGC_LEN);
|
||||||
.id = MLXSW_REG_SFGC_ID,
|
|
||||||
.len = MLXSW_REG_SFGC_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
enum mlxsw_reg_sfgc_type {
|
enum mlxsw_reg_sfgc_type {
|
||||||
MLXSW_REG_SFGC_TYPE_BROADCAST,
|
MLXSW_REG_SFGC_TYPE_BROADCAST,
|
||||||
@ -1045,10 +1017,7 @@ mlxsw_reg_sfgc_pack(char *payload, enum mlxsw_reg_sfgc_type type,
|
|||||||
#define MLXSW_REG_SFTR_ID 0x2012
|
#define MLXSW_REG_SFTR_ID 0x2012
|
||||||
#define MLXSW_REG_SFTR_LEN 0x420
|
#define MLXSW_REG_SFTR_LEN 0x420
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sftr = {
|
MLXSW_REG_DEFINE(sftr, MLXSW_REG_SFTR_ID, MLXSW_REG_SFTR_LEN);
|
||||||
.id = MLXSW_REG_SFTR_ID,
|
|
||||||
.len = MLXSW_REG_SFTR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_sftr_swid
|
/* reg_sftr_swid
|
||||||
* Switch partition ID with which to associate the port.
|
* Switch partition ID with which to associate the port.
|
||||||
@ -1118,10 +1087,7 @@ static inline void mlxsw_reg_sftr_pack(char *payload,
|
|||||||
#define MLXSW_REG_SFDF_ID 0x2013
|
#define MLXSW_REG_SFDF_ID 0x2013
|
||||||
#define MLXSW_REG_SFDF_LEN 0x14
|
#define MLXSW_REG_SFDF_LEN 0x14
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sfdf = {
|
MLXSW_REG_DEFINE(sfdf, MLXSW_REG_SFDF_ID, MLXSW_REG_SFDF_LEN);
|
||||||
.id = MLXSW_REG_SFDF_ID,
|
|
||||||
.len = MLXSW_REG_SFDF_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_sfdf_swid
|
/* reg_sfdf_swid
|
||||||
* Switch partition ID.
|
* Switch partition ID.
|
||||||
@ -1205,10 +1171,7 @@ MLXSW_ITEM32(reg, sfdf, lag_fid_lag_id, 0x08, 0, 10);
|
|||||||
#define MLXSW_REG_SLDR_ID 0x2014
|
#define MLXSW_REG_SLDR_ID 0x2014
|
||||||
#define MLXSW_REG_SLDR_LEN 0x0C /* counting in only one port in list */
|
#define MLXSW_REG_SLDR_LEN 0x0C /* counting in only one port in list */
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sldr = {
|
MLXSW_REG_DEFINE(sldr, MLXSW_REG_SLDR_ID, MLXSW_REG_SLDR_LEN);
|
||||||
.id = MLXSW_REG_SLDR_ID,
|
|
||||||
.len = MLXSW_REG_SLDR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
enum mlxsw_reg_sldr_op {
|
enum mlxsw_reg_sldr_op {
|
||||||
/* Indicates a creation of a new LAG-ID, lag_id must be valid */
|
/* Indicates a creation of a new LAG-ID, lag_id must be valid */
|
||||||
@ -1288,10 +1251,7 @@ static inline void mlxsw_reg_sldr_lag_remove_port_pack(char *payload, u8 lag_id,
|
|||||||
#define MLXSW_REG_SLCR_ID 0x2015
|
#define MLXSW_REG_SLCR_ID 0x2015
|
||||||
#define MLXSW_REG_SLCR_LEN 0x10
|
#define MLXSW_REG_SLCR_LEN 0x10
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_slcr = {
|
MLXSW_REG_DEFINE(slcr, MLXSW_REG_SLCR_ID, MLXSW_REG_SLCR_LEN);
|
||||||
.id = MLXSW_REG_SLCR_ID,
|
|
||||||
.len = MLXSW_REG_SLCR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
enum mlxsw_reg_slcr_pp {
|
enum mlxsw_reg_slcr_pp {
|
||||||
/* Global Configuration (for all ports) */
|
/* Global Configuration (for all ports) */
|
||||||
@ -1404,10 +1364,7 @@ static inline void mlxsw_reg_slcr_pack(char *payload, u16 lag_hash)
|
|||||||
#define MLXSW_REG_SLCOR_ID 0x2016
|
#define MLXSW_REG_SLCOR_ID 0x2016
|
||||||
#define MLXSW_REG_SLCOR_LEN 0x10
|
#define MLXSW_REG_SLCOR_LEN 0x10
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_slcor = {
|
MLXSW_REG_DEFINE(slcor, MLXSW_REG_SLCOR_ID, MLXSW_REG_SLCOR_LEN);
|
||||||
.id = MLXSW_REG_SLCOR_ID,
|
|
||||||
.len = MLXSW_REG_SLCOR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
enum mlxsw_reg_slcor_col {
|
enum mlxsw_reg_slcor_col {
|
||||||
/* Port is added with collector disabled */
|
/* Port is added with collector disabled */
|
||||||
@ -1490,10 +1447,7 @@ static inline void mlxsw_reg_slcor_col_disable_pack(char *payload,
|
|||||||
#define MLXSW_REG_SPMLR_ID 0x2018
|
#define MLXSW_REG_SPMLR_ID 0x2018
|
||||||
#define MLXSW_REG_SPMLR_LEN 0x8
|
#define MLXSW_REG_SPMLR_LEN 0x8
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_spmlr = {
|
MLXSW_REG_DEFINE(spmlr, MLXSW_REG_SPMLR_ID, MLXSW_REG_SPMLR_LEN);
|
||||||
.id = MLXSW_REG_SPMLR_ID,
|
|
||||||
.len = MLXSW_REG_SPMLR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_spmlr_local_port
|
/* reg_spmlr_local_port
|
||||||
* Local port number.
|
* Local port number.
|
||||||
@ -1544,10 +1498,7 @@ static inline void mlxsw_reg_spmlr_pack(char *payload, u8 local_port,
|
|||||||
#define MLXSW_REG_SVFA_ID 0x201C
|
#define MLXSW_REG_SVFA_ID 0x201C
|
||||||
#define MLXSW_REG_SVFA_LEN 0x10
|
#define MLXSW_REG_SVFA_LEN 0x10
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_svfa = {
|
MLXSW_REG_DEFINE(svfa, MLXSW_REG_SVFA_ID, MLXSW_REG_SVFA_LEN);
|
||||||
.id = MLXSW_REG_SVFA_ID,
|
|
||||||
.len = MLXSW_REG_SVFA_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_svfa_swid
|
/* reg_svfa_swid
|
||||||
* Switch partition ID.
|
* Switch partition ID.
|
||||||
@ -1636,10 +1587,7 @@ static inline void mlxsw_reg_svfa_pack(char *payload, u8 local_port,
|
|||||||
#define MLXSW_REG_SVPE_ID 0x201E
|
#define MLXSW_REG_SVPE_ID 0x201E
|
||||||
#define MLXSW_REG_SVPE_LEN 0x4
|
#define MLXSW_REG_SVPE_LEN 0x4
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_svpe = {
|
MLXSW_REG_DEFINE(svpe, MLXSW_REG_SVPE_ID, MLXSW_REG_SVPE_LEN);
|
||||||
.id = MLXSW_REG_SVPE_ID,
|
|
||||||
.len = MLXSW_REG_SVPE_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_svpe_local_port
|
/* reg_svpe_local_port
|
||||||
* Local port number
|
* Local port number
|
||||||
@ -1672,10 +1620,7 @@ static inline void mlxsw_reg_svpe_pack(char *payload, u8 local_port,
|
|||||||
#define MLXSW_REG_SFMR_ID 0x201F
|
#define MLXSW_REG_SFMR_ID 0x201F
|
||||||
#define MLXSW_REG_SFMR_LEN 0x18
|
#define MLXSW_REG_SFMR_LEN 0x18
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sfmr = {
|
MLXSW_REG_DEFINE(sfmr, MLXSW_REG_SFMR_ID, MLXSW_REG_SFMR_LEN);
|
||||||
.id = MLXSW_REG_SFMR_ID,
|
|
||||||
.len = MLXSW_REG_SFMR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
enum mlxsw_reg_sfmr_op {
|
enum mlxsw_reg_sfmr_op {
|
||||||
MLXSW_REG_SFMR_OP_CREATE_FID,
|
MLXSW_REG_SFMR_OP_CREATE_FID,
|
||||||
@ -1762,10 +1707,7 @@ static inline void mlxsw_reg_sfmr_pack(char *payload,
|
|||||||
MLXSW_REG_SPVMLR_REC_LEN * \
|
MLXSW_REG_SPVMLR_REC_LEN * \
|
||||||
MLXSW_REG_SPVMLR_REC_MAX_COUNT)
|
MLXSW_REG_SPVMLR_REC_MAX_COUNT)
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_spvmlr = {
|
MLXSW_REG_DEFINE(spvmlr, MLXSW_REG_SPVMLR_ID, MLXSW_REG_SPVMLR_LEN);
|
||||||
.id = MLXSW_REG_SPVMLR_ID,
|
|
||||||
.len = MLXSW_REG_SPVMLR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_spvmlr_local_port
|
/* reg_spvmlr_local_port
|
||||||
* Local ingress port.
|
* Local ingress port.
|
||||||
@ -1823,10 +1765,7 @@ static inline void mlxsw_reg_spvmlr_pack(char *payload, u8 local_port,
|
|||||||
#define MLXSW_REG_QTCT_ID 0x400A
|
#define MLXSW_REG_QTCT_ID 0x400A
|
||||||
#define MLXSW_REG_QTCT_LEN 0x08
|
#define MLXSW_REG_QTCT_LEN 0x08
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_qtct = {
|
MLXSW_REG_DEFINE(qtct, MLXSW_REG_QTCT_ID, MLXSW_REG_QTCT_LEN);
|
||||||
.id = MLXSW_REG_QTCT_ID,
|
|
||||||
.len = MLXSW_REG_QTCT_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_qtct_local_port
|
/* reg_qtct_local_port
|
||||||
* Local port number.
|
* Local port number.
|
||||||
@ -1875,10 +1814,7 @@ static inline void mlxsw_reg_qtct_pack(char *payload, u8 local_port,
|
|||||||
#define MLXSW_REG_QEEC_ID 0x400D
|
#define MLXSW_REG_QEEC_ID 0x400D
|
||||||
#define MLXSW_REG_QEEC_LEN 0x1C
|
#define MLXSW_REG_QEEC_LEN 0x1C
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_qeec = {
|
MLXSW_REG_DEFINE(qeec, MLXSW_REG_QEEC_ID, MLXSW_REG_QEEC_LEN);
|
||||||
.id = MLXSW_REG_QEEC_ID,
|
|
||||||
.len = MLXSW_REG_QEEC_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_qeec_local_port
|
/* reg_qeec_local_port
|
||||||
* Local port number.
|
* Local port number.
|
||||||
@ -2000,10 +1936,7 @@ static inline void mlxsw_reg_qeec_pack(char *payload, u8 local_port,
|
|||||||
#define MLXSW_REG_PMLP_ID 0x5002
|
#define MLXSW_REG_PMLP_ID 0x5002
|
||||||
#define MLXSW_REG_PMLP_LEN 0x40
|
#define MLXSW_REG_PMLP_LEN 0x40
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_pmlp = {
|
MLXSW_REG_DEFINE(pmlp, MLXSW_REG_PMLP_ID, MLXSW_REG_PMLP_LEN);
|
||||||
.id = MLXSW_REG_PMLP_ID,
|
|
||||||
.len = MLXSW_REG_PMLP_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_pmlp_rxtx
|
/* reg_pmlp_rxtx
|
||||||
* 0 - Tx value is used for both Tx and Rx.
|
* 0 - Tx value is used for both Tx and Rx.
|
||||||
@ -2059,10 +1992,7 @@ static inline void mlxsw_reg_pmlp_pack(char *payload, u8 local_port)
|
|||||||
#define MLXSW_REG_PMTU_ID 0x5003
|
#define MLXSW_REG_PMTU_ID 0x5003
|
||||||
#define MLXSW_REG_PMTU_LEN 0x10
|
#define MLXSW_REG_PMTU_LEN 0x10
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_pmtu = {
|
MLXSW_REG_DEFINE(pmtu, MLXSW_REG_PMTU_ID, MLXSW_REG_PMTU_LEN);
|
||||||
.id = MLXSW_REG_PMTU_ID,
|
|
||||||
.len = MLXSW_REG_PMTU_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_pmtu_local_port
|
/* reg_pmtu_local_port
|
||||||
* Local port number.
|
* Local port number.
|
||||||
@ -2116,10 +2046,7 @@ static inline void mlxsw_reg_pmtu_pack(char *payload, u8 local_port,
|
|||||||
#define MLXSW_REG_PTYS_ID 0x5004
|
#define MLXSW_REG_PTYS_ID 0x5004
|
||||||
#define MLXSW_REG_PTYS_LEN 0x40
|
#define MLXSW_REG_PTYS_LEN 0x40
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_ptys = {
|
MLXSW_REG_DEFINE(ptys, MLXSW_REG_PTYS_ID, MLXSW_REG_PTYS_LEN);
|
||||||
.id = MLXSW_REG_PTYS_ID,
|
|
||||||
.len = MLXSW_REG_PTYS_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_ptys_local_port
|
/* reg_ptys_local_port
|
||||||
* Local port number.
|
* Local port number.
|
||||||
@ -2232,10 +2159,7 @@ static inline void mlxsw_reg_ptys_unpack(char *payload, u32 *p_eth_proto_cap,
|
|||||||
#define MLXSW_REG_PPAD_ID 0x5005
|
#define MLXSW_REG_PPAD_ID 0x5005
|
||||||
#define MLXSW_REG_PPAD_LEN 0x10
|
#define MLXSW_REG_PPAD_LEN 0x10
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_ppad = {
|
MLXSW_REG_DEFINE(ppad, MLXSW_REG_PPAD_ID, MLXSW_REG_PPAD_LEN);
|
||||||
.id = MLXSW_REG_PPAD_ID,
|
|
||||||
.len = MLXSW_REG_PPAD_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_ppad_single_base_mac
|
/* reg_ppad_single_base_mac
|
||||||
* 0: base_mac, local port should be 0 and mac[7:0] is
|
* 0: base_mac, local port should be 0 and mac[7:0] is
|
||||||
@ -2273,10 +2197,7 @@ static inline void mlxsw_reg_ppad_pack(char *payload, bool single_base_mac,
|
|||||||
#define MLXSW_REG_PAOS_ID 0x5006
|
#define MLXSW_REG_PAOS_ID 0x5006
|
||||||
#define MLXSW_REG_PAOS_LEN 0x10
|
#define MLXSW_REG_PAOS_LEN 0x10
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_paos = {
|
MLXSW_REG_DEFINE(paos, MLXSW_REG_PAOS_ID, MLXSW_REG_PAOS_LEN);
|
||||||
.id = MLXSW_REG_PAOS_ID,
|
|
||||||
.len = MLXSW_REG_PAOS_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_paos_swid
|
/* reg_paos_swid
|
||||||
* Switch partition ID with which to associate the port.
|
* Switch partition ID with which to associate the port.
|
||||||
@ -2356,10 +2277,7 @@ static inline void mlxsw_reg_paos_pack(char *payload, u8 local_port,
|
|||||||
#define MLXSW_REG_PFCC_ID 0x5007
|
#define MLXSW_REG_PFCC_ID 0x5007
|
||||||
#define MLXSW_REG_PFCC_LEN 0x20
|
#define MLXSW_REG_PFCC_LEN 0x20
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_pfcc = {
|
MLXSW_REG_DEFINE(pfcc, MLXSW_REG_PFCC_ID, MLXSW_REG_PFCC_LEN);
|
||||||
.id = MLXSW_REG_PFCC_ID,
|
|
||||||
.len = MLXSW_REG_PFCC_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_pfcc_local_port
|
/* reg_pfcc_local_port
|
||||||
* Local port number.
|
* Local port number.
|
||||||
@ -2495,10 +2413,7 @@ static inline void mlxsw_reg_pfcc_pack(char *payload, u8 local_port)
|
|||||||
#define MLXSW_REG_PPCNT_ID 0x5008
|
#define MLXSW_REG_PPCNT_ID 0x5008
|
||||||
#define MLXSW_REG_PPCNT_LEN 0x100
|
#define MLXSW_REG_PPCNT_LEN 0x100
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_ppcnt = {
|
MLXSW_REG_DEFINE(ppcnt, MLXSW_REG_PPCNT_ID, MLXSW_REG_PPCNT_LEN);
|
||||||
.id = MLXSW_REG_PPCNT_ID,
|
|
||||||
.len = MLXSW_REG_PPCNT_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_ppcnt_swid
|
/* reg_ppcnt_swid
|
||||||
* For HCA: must be always 0.
|
* For HCA: must be always 0.
|
||||||
@ -2768,10 +2683,7 @@ static inline void mlxsw_reg_ppcnt_pack(char *payload, u8 local_port,
|
|||||||
#define MLXSW_REG_PPTB_ID 0x500B
|
#define MLXSW_REG_PPTB_ID 0x500B
|
||||||
#define MLXSW_REG_PPTB_LEN 0x10
|
#define MLXSW_REG_PPTB_LEN 0x10
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_pptb = {
|
MLXSW_REG_DEFINE(pptb, MLXSW_REG_PPTB_ID, MLXSW_REG_PPTB_LEN);
|
||||||
.id = MLXSW_REG_PPTB_ID,
|
|
||||||
.len = MLXSW_REG_PPTB_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
enum {
|
enum {
|
||||||
MLXSW_REG_PPTB_MM_UM,
|
MLXSW_REG_PPTB_MM_UM,
|
||||||
@ -2865,10 +2777,7 @@ static inline void mlxsw_reg_pptb_prio_to_buff_pack(char *payload, u8 prio,
|
|||||||
#define MLXSW_REG_PBMC_ID 0x500C
|
#define MLXSW_REG_PBMC_ID 0x500C
|
||||||
#define MLXSW_REG_PBMC_LEN 0x6C
|
#define MLXSW_REG_PBMC_LEN 0x6C
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_pbmc = {
|
MLXSW_REG_DEFINE(pbmc, MLXSW_REG_PBMC_ID, MLXSW_REG_PBMC_LEN);
|
||||||
.id = MLXSW_REG_PBMC_ID,
|
|
||||||
.len = MLXSW_REG_PBMC_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_pbmc_local_port
|
/* reg_pbmc_local_port
|
||||||
* Local port number.
|
* Local port number.
|
||||||
@ -2978,10 +2887,7 @@ static inline void mlxsw_reg_pbmc_lossless_buffer_pack(char *payload,
|
|||||||
#define MLXSW_REG_PSPA_ID 0x500D
|
#define MLXSW_REG_PSPA_ID 0x500D
|
||||||
#define MLXSW_REG_PSPA_LEN 0x8
|
#define MLXSW_REG_PSPA_LEN 0x8
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_pspa = {
|
MLXSW_REG_DEFINE(pspa, MLXSW_REG_PSPA_ID, MLXSW_REG_PSPA_LEN);
|
||||||
.id = MLXSW_REG_PSPA_ID,
|
|
||||||
.len = MLXSW_REG_PSPA_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_pspa_swid
|
/* reg_pspa_swid
|
||||||
* Switch partition ID.
|
* Switch partition ID.
|
||||||
@ -3017,10 +2923,7 @@ static inline void mlxsw_reg_pspa_pack(char *payload, u8 swid, u8 local_port)
|
|||||||
#define MLXSW_REG_HTGT_ID 0x7002
|
#define MLXSW_REG_HTGT_ID 0x7002
|
||||||
#define MLXSW_REG_HTGT_LEN 0x100
|
#define MLXSW_REG_HTGT_LEN 0x100
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_htgt = {
|
MLXSW_REG_DEFINE(htgt, MLXSW_REG_HTGT_ID, MLXSW_REG_HTGT_LEN);
|
||||||
.id = MLXSW_REG_HTGT_ID,
|
|
||||||
.len = MLXSW_REG_HTGT_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_htgt_swid
|
/* reg_htgt_swid
|
||||||
* Switch partition ID.
|
* Switch partition ID.
|
||||||
@ -3154,10 +3057,7 @@ static inline void mlxsw_reg_htgt_pack(char *payload,
|
|||||||
#define MLXSW_REG_HPKT_ID 0x7003
|
#define MLXSW_REG_HPKT_ID 0x7003
|
||||||
#define MLXSW_REG_HPKT_LEN 0x10
|
#define MLXSW_REG_HPKT_LEN 0x10
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_hpkt = {
|
MLXSW_REG_DEFINE(hpkt, MLXSW_REG_HPKT_ID, MLXSW_REG_HPKT_LEN);
|
||||||
.id = MLXSW_REG_HPKT_ID,
|
|
||||||
.len = MLXSW_REG_HPKT_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
enum {
|
enum {
|
||||||
MLXSW_REG_HPKT_ACK_NOT_REQUIRED,
|
MLXSW_REG_HPKT_ACK_NOT_REQUIRED,
|
||||||
@ -3256,10 +3156,7 @@ static inline void mlxsw_reg_hpkt_pack(char *payload, u8 action, u16 trap_id)
|
|||||||
#define MLXSW_REG_RGCR_ID 0x8001
|
#define MLXSW_REG_RGCR_ID 0x8001
|
||||||
#define MLXSW_REG_RGCR_LEN 0x28
|
#define MLXSW_REG_RGCR_LEN 0x28
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_rgcr = {
|
MLXSW_REG_DEFINE(rgcr, MLXSW_REG_RGCR_ID, MLXSW_REG_RGCR_LEN);
|
||||||
.id = MLXSW_REG_RGCR_ID,
|
|
||||||
.len = MLXSW_REG_RGCR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_rgcr_ipv4_en
|
/* reg_rgcr_ipv4_en
|
||||||
* IPv4 router enable.
|
* IPv4 router enable.
|
||||||
@ -3330,10 +3227,7 @@ static inline void mlxsw_reg_rgcr_pack(char *payload, bool ipv4_en)
|
|||||||
#define MLXSW_REG_RITR_ID 0x8002
|
#define MLXSW_REG_RITR_ID 0x8002
|
||||||
#define MLXSW_REG_RITR_LEN 0x40
|
#define MLXSW_REG_RITR_LEN 0x40
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_ritr = {
|
MLXSW_REG_DEFINE(ritr, MLXSW_REG_RITR_ID, MLXSW_REG_RITR_LEN);
|
||||||
.id = MLXSW_REG_RITR_ID,
|
|
||||||
.len = MLXSW_REG_RITR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_ritr_enable
|
/* reg_ritr_enable
|
||||||
* Enables routing on the router interface.
|
* Enables routing on the router interface.
|
||||||
@ -3533,10 +3427,7 @@ static inline void mlxsw_reg_ritr_pack(char *payload, bool enable,
|
|||||||
#define MLXSW_REG_RATR_ID 0x8008
|
#define MLXSW_REG_RATR_ID 0x8008
|
||||||
#define MLXSW_REG_RATR_LEN 0x2C
|
#define MLXSW_REG_RATR_LEN 0x2C
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_ratr = {
|
MLXSW_REG_DEFINE(ratr, MLXSW_REG_RATR_ID, MLXSW_REG_RATR_LEN);
|
||||||
.id = MLXSW_REG_RATR_ID,
|
|
||||||
.len = MLXSW_REG_RATR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
enum mlxsw_reg_ratr_op {
|
enum mlxsw_reg_ratr_op {
|
||||||
/* Read */
|
/* Read */
|
||||||
@ -3663,10 +3554,7 @@ static inline void mlxsw_reg_ratr_eth_entry_pack(char *payload,
|
|||||||
#define MLXSW_REG_RALTA_ID 0x8010
|
#define MLXSW_REG_RALTA_ID 0x8010
|
||||||
#define MLXSW_REG_RALTA_LEN 0x04
|
#define MLXSW_REG_RALTA_LEN 0x04
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_ralta = {
|
MLXSW_REG_DEFINE(ralta, MLXSW_REG_RALTA_ID, MLXSW_REG_RALTA_LEN);
|
||||||
.id = MLXSW_REG_RALTA_ID,
|
|
||||||
.len = MLXSW_REG_RALTA_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_ralta_op
|
/* reg_ralta_op
|
||||||
* opcode (valid for Write, must be 0 on Read)
|
* opcode (valid for Write, must be 0 on Read)
|
||||||
@ -3718,10 +3606,7 @@ static inline void mlxsw_reg_ralta_pack(char *payload, bool alloc,
|
|||||||
#define MLXSW_REG_RALST_ID 0x8011
|
#define MLXSW_REG_RALST_ID 0x8011
|
||||||
#define MLXSW_REG_RALST_LEN 0x104
|
#define MLXSW_REG_RALST_LEN 0x104
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_ralst = {
|
MLXSW_REG_DEFINE(ralst, MLXSW_REG_RALST_ID, MLXSW_REG_RALST_LEN);
|
||||||
.id = MLXSW_REG_RALST_ID,
|
|
||||||
.len = MLXSW_REG_RALST_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_ralst_root_bin
|
/* reg_ralst_root_bin
|
||||||
* The bin number of the root bin.
|
* The bin number of the root bin.
|
||||||
@ -3788,10 +3673,7 @@ static inline void mlxsw_reg_ralst_bin_pack(char *payload, u8 bin_number,
|
|||||||
#define MLXSW_REG_RALTB_ID 0x8012
|
#define MLXSW_REG_RALTB_ID 0x8012
|
||||||
#define MLXSW_REG_RALTB_LEN 0x04
|
#define MLXSW_REG_RALTB_LEN 0x04
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_raltb = {
|
MLXSW_REG_DEFINE(raltb, MLXSW_REG_RALTB_ID, MLXSW_REG_RALTB_LEN);
|
||||||
.id = MLXSW_REG_RALTB_ID,
|
|
||||||
.len = MLXSW_REG_RALTB_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_raltb_virtual_router
|
/* reg_raltb_virtual_router
|
||||||
* Virtual Router ID
|
* Virtual Router ID
|
||||||
@ -3832,10 +3714,7 @@ static inline void mlxsw_reg_raltb_pack(char *payload, u16 virtual_router,
|
|||||||
#define MLXSW_REG_RALUE_ID 0x8013
|
#define MLXSW_REG_RALUE_ID 0x8013
|
||||||
#define MLXSW_REG_RALUE_LEN 0x38
|
#define MLXSW_REG_RALUE_LEN 0x38
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_ralue = {
|
MLXSW_REG_DEFINE(ralue, MLXSW_REG_RALUE_ID, MLXSW_REG_RALUE_LEN);
|
||||||
.id = MLXSW_REG_RALUE_ID,
|
|
||||||
.len = MLXSW_REG_RALUE_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_ralue_protocol
|
/* reg_ralue_protocol
|
||||||
* Protocol.
|
* Protocol.
|
||||||
@ -4095,10 +3974,7 @@ mlxsw_reg_ralue_act_ip2me_pack(char *payload)
|
|||||||
#define MLXSW_REG_RAUHT_ID 0x8014
|
#define MLXSW_REG_RAUHT_ID 0x8014
|
||||||
#define MLXSW_REG_RAUHT_LEN 0x74
|
#define MLXSW_REG_RAUHT_LEN 0x74
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_rauht = {
|
MLXSW_REG_DEFINE(rauht, MLXSW_REG_RAUHT_ID, MLXSW_REG_RAUHT_LEN);
|
||||||
.id = MLXSW_REG_RAUHT_ID,
|
|
||||||
.len = MLXSW_REG_RAUHT_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
enum mlxsw_reg_rauht_type {
|
enum mlxsw_reg_rauht_type {
|
||||||
MLXSW_REG_RAUHT_TYPE_IPV4,
|
MLXSW_REG_RAUHT_TYPE_IPV4,
|
||||||
@ -4234,10 +4110,7 @@ static inline void mlxsw_reg_rauht_pack4(char *payload,
|
|||||||
#define MLXSW_REG_RALEU_ID 0x8015
|
#define MLXSW_REG_RALEU_ID 0x8015
|
||||||
#define MLXSW_REG_RALEU_LEN 0x28
|
#define MLXSW_REG_RALEU_LEN 0x28
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_raleu = {
|
MLXSW_REG_DEFINE(raleu, MLXSW_REG_RALEU_ID, MLXSW_REG_RALEU_LEN);
|
||||||
.id = MLXSW_REG_RALEU_ID,
|
|
||||||
.len = MLXSW_REG_RALEU_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_raleu_protocol
|
/* reg_raleu_protocol
|
||||||
* Protocol.
|
* Protocol.
|
||||||
@ -4309,10 +4182,7 @@ static inline void mlxsw_reg_raleu_pack(char *payload,
|
|||||||
MLXSW_REG_RAUHTD_REC_MAX_NUM * MLXSW_REG_RAUHTD_REC_LEN)
|
MLXSW_REG_RAUHTD_REC_MAX_NUM * MLXSW_REG_RAUHTD_REC_LEN)
|
||||||
#define MLXSW_REG_RAUHTD_IPV4_ENT_PER_REC 4
|
#define MLXSW_REG_RAUHTD_IPV4_ENT_PER_REC 4
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_rauhtd = {
|
MLXSW_REG_DEFINE(rauhtd, MLXSW_REG_RAUHTD_ID, MLXSW_REG_RAUHTD_LEN);
|
||||||
.id = MLXSW_REG_RAUHTD_ID,
|
|
||||||
.len = MLXSW_REG_RAUHTD_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
#define MLXSW_REG_RAUHTD_FILTER_A BIT(0)
|
#define MLXSW_REG_RAUHTD_FILTER_A BIT(0)
|
||||||
#define MLXSW_REG_RAUHTD_FILTER_RIF BIT(3)
|
#define MLXSW_REG_RAUHTD_FILTER_RIF BIT(3)
|
||||||
@ -4444,10 +4314,7 @@ static inline void mlxsw_reg_rauhtd_ent_ipv4_unpack(char *payload,
|
|||||||
#define MLXSW_REG_MFCR_ID 0x9001
|
#define MLXSW_REG_MFCR_ID 0x9001
|
||||||
#define MLXSW_REG_MFCR_LEN 0x08
|
#define MLXSW_REG_MFCR_LEN 0x08
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_mfcr = {
|
MLXSW_REG_DEFINE(mfcr, MLXSW_REG_MFCR_ID, MLXSW_REG_MFCR_LEN);
|
||||||
.id = MLXSW_REG_MFCR_ID,
|
|
||||||
.len = MLXSW_REG_MFCR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
enum mlxsw_reg_mfcr_pwm_frequency {
|
enum mlxsw_reg_mfcr_pwm_frequency {
|
||||||
MLXSW_REG_MFCR_PWM_FEQ_11HZ = 0x00,
|
MLXSW_REG_MFCR_PWM_FEQ_11HZ = 0x00,
|
||||||
@ -4507,10 +4374,7 @@ mlxsw_reg_mfcr_unpack(char *payload,
|
|||||||
#define MLXSW_REG_MFSC_ID 0x9002
|
#define MLXSW_REG_MFSC_ID 0x9002
|
||||||
#define MLXSW_REG_MFSC_LEN 0x08
|
#define MLXSW_REG_MFSC_LEN 0x08
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_mfsc = {
|
MLXSW_REG_DEFINE(mfsc, MLXSW_REG_MFSC_ID, MLXSW_REG_MFSC_LEN);
|
||||||
.id = MLXSW_REG_MFSC_ID,
|
|
||||||
.len = MLXSW_REG_MFSC_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_mfsc_pwm
|
/* reg_mfsc_pwm
|
||||||
* Fan pwm to control / monitor.
|
* Fan pwm to control / monitor.
|
||||||
@ -4541,10 +4405,7 @@ static inline void mlxsw_reg_mfsc_pack(char *payload, u8 pwm,
|
|||||||
#define MLXSW_REG_MFSM_ID 0x9003
|
#define MLXSW_REG_MFSM_ID 0x9003
|
||||||
#define MLXSW_REG_MFSM_LEN 0x08
|
#define MLXSW_REG_MFSM_LEN 0x08
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_mfsm = {
|
MLXSW_REG_DEFINE(mfsm, MLXSW_REG_MFSM_ID, MLXSW_REG_MFSM_LEN);
|
||||||
.id = MLXSW_REG_MFSM_ID,
|
|
||||||
.len = MLXSW_REG_MFSM_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_mfsm_tacho
|
/* reg_mfsm_tacho
|
||||||
* Fan tachometer index.
|
* Fan tachometer index.
|
||||||
@ -4572,10 +4433,7 @@ static inline void mlxsw_reg_mfsm_pack(char *payload, u8 tacho)
|
|||||||
#define MLXSW_REG_MTCAP_ID 0x9009
|
#define MLXSW_REG_MTCAP_ID 0x9009
|
||||||
#define MLXSW_REG_MTCAP_LEN 0x08
|
#define MLXSW_REG_MTCAP_LEN 0x08
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_mtcap = {
|
MLXSW_REG_DEFINE(mtcap, MLXSW_REG_MTCAP_ID, MLXSW_REG_MTCAP_LEN);
|
||||||
.id = MLXSW_REG_MTCAP_ID,
|
|
||||||
.len = MLXSW_REG_MTCAP_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_mtcap_sensor_count
|
/* reg_mtcap_sensor_count
|
||||||
* Number of sensors supported by the device.
|
* Number of sensors supported by the device.
|
||||||
@ -4593,10 +4451,7 @@ MLXSW_ITEM32(reg, mtcap, sensor_count, 0x00, 0, 7);
|
|||||||
#define MLXSW_REG_MTMP_ID 0x900A
|
#define MLXSW_REG_MTMP_ID 0x900A
|
||||||
#define MLXSW_REG_MTMP_LEN 0x20
|
#define MLXSW_REG_MTMP_LEN 0x20
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_mtmp = {
|
MLXSW_REG_DEFINE(mtmp, MLXSW_REG_MTMP_ID, MLXSW_REG_MTMP_LEN);
|
||||||
.id = MLXSW_REG_MTMP_ID,
|
|
||||||
.len = MLXSW_REG_MTMP_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_mtmp_sensor_index
|
/* reg_mtmp_sensor_index
|
||||||
* Sensors index to access.
|
* Sensors index to access.
|
||||||
@ -4679,10 +4534,7 @@ static inline void mlxsw_reg_mtmp_unpack(char *payload, unsigned int *p_temp,
|
|||||||
#define MLXSW_REG_MPAT_ID 0x901A
|
#define MLXSW_REG_MPAT_ID 0x901A
|
||||||
#define MLXSW_REG_MPAT_LEN 0x78
|
#define MLXSW_REG_MPAT_LEN 0x78
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_mpat = {
|
MLXSW_REG_DEFINE(mpat, MLXSW_REG_MPAT_ID, MLXSW_REG_MPAT_LEN);
|
||||||
.id = MLXSW_REG_MPAT_ID,
|
|
||||||
.len = MLXSW_REG_MPAT_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_mpat_pa_id
|
/* reg_mpat_pa_id
|
||||||
* Port Analyzer ID.
|
* Port Analyzer ID.
|
||||||
@ -4742,10 +4594,7 @@ static inline void mlxsw_reg_mpat_pack(char *payload, u8 pa_id,
|
|||||||
#define MLXSW_REG_MPAR_ID 0x901B
|
#define MLXSW_REG_MPAR_ID 0x901B
|
||||||
#define MLXSW_REG_MPAR_LEN 0x08
|
#define MLXSW_REG_MPAR_LEN 0x08
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_mpar = {
|
MLXSW_REG_DEFINE(mpar, MLXSW_REG_MPAR_ID, MLXSW_REG_MPAR_LEN);
|
||||||
.id = MLXSW_REG_MPAR_ID,
|
|
||||||
.len = MLXSW_REG_MPAR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_mpar_local_port
|
/* reg_mpar_local_port
|
||||||
* The local port to mirror the packets from.
|
* The local port to mirror the packets from.
|
||||||
@ -4795,10 +4644,7 @@ static inline void mlxsw_reg_mpar_pack(char *payload, u8 local_port,
|
|||||||
#define MLXSW_REG_MLCR_ID 0x902B
|
#define MLXSW_REG_MLCR_ID 0x902B
|
||||||
#define MLXSW_REG_MLCR_LEN 0x0C
|
#define MLXSW_REG_MLCR_LEN 0x0C
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_mlcr = {
|
MLXSW_REG_DEFINE(mlcr, MLXSW_REG_MLCR_ID, MLXSW_REG_MLCR_LEN);
|
||||||
.id = MLXSW_REG_MLCR_ID,
|
|
||||||
.len = MLXSW_REG_MLCR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_mlcr_local_port
|
/* reg_mlcr_local_port
|
||||||
* Local port number.
|
* Local port number.
|
||||||
@ -4839,10 +4685,7 @@ static inline void mlxsw_reg_mlcr_pack(char *payload, u8 local_port,
|
|||||||
#define MLXSW_REG_SBPR_ID 0xB001
|
#define MLXSW_REG_SBPR_ID 0xB001
|
||||||
#define MLXSW_REG_SBPR_LEN 0x14
|
#define MLXSW_REG_SBPR_LEN 0x14
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sbpr = {
|
MLXSW_REG_DEFINE(sbpr, MLXSW_REG_SBPR_ID, MLXSW_REG_SBPR_LEN);
|
||||||
.id = MLXSW_REG_SBPR_ID,
|
|
||||||
.len = MLXSW_REG_SBPR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* shared direstion enum for SBPR, SBCM, SBPM */
|
/* shared direstion enum for SBPR, SBCM, SBPM */
|
||||||
enum mlxsw_reg_sbxx_dir {
|
enum mlxsw_reg_sbxx_dir {
|
||||||
@ -4899,10 +4742,7 @@ static inline void mlxsw_reg_sbpr_pack(char *payload, u8 pool,
|
|||||||
#define MLXSW_REG_SBCM_ID 0xB002
|
#define MLXSW_REG_SBCM_ID 0xB002
|
||||||
#define MLXSW_REG_SBCM_LEN 0x28
|
#define MLXSW_REG_SBCM_LEN 0x28
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sbcm = {
|
MLXSW_REG_DEFINE(sbcm, MLXSW_REG_SBCM_ID, MLXSW_REG_SBCM_LEN);
|
||||||
.id = MLXSW_REG_SBCM_ID,
|
|
||||||
.len = MLXSW_REG_SBCM_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_sbcm_local_port
|
/* reg_sbcm_local_port
|
||||||
* Local port number.
|
* Local port number.
|
||||||
@ -4979,10 +4819,7 @@ static inline void mlxsw_reg_sbcm_pack(char *payload, u8 local_port, u8 pg_buff,
|
|||||||
#define MLXSW_REG_SBPM_ID 0xB003
|
#define MLXSW_REG_SBPM_ID 0xB003
|
||||||
#define MLXSW_REG_SBPM_LEN 0x28
|
#define MLXSW_REG_SBPM_LEN 0x28
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sbpm = {
|
MLXSW_REG_DEFINE(sbpm, MLXSW_REG_SBPM_ID, MLXSW_REG_SBPM_LEN);
|
||||||
.id = MLXSW_REG_SBPM_ID,
|
|
||||||
.len = MLXSW_REG_SBPM_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_sbpm_local_port
|
/* reg_sbpm_local_port
|
||||||
* Local port number.
|
* Local port number.
|
||||||
@ -5073,10 +4910,7 @@ static inline void mlxsw_reg_sbpm_unpack(char *payload, u32 *p_buff_occupancy,
|
|||||||
#define MLXSW_REG_SBMM_ID 0xB004
|
#define MLXSW_REG_SBMM_ID 0xB004
|
||||||
#define MLXSW_REG_SBMM_LEN 0x28
|
#define MLXSW_REG_SBMM_LEN 0x28
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sbmm = {
|
MLXSW_REG_DEFINE(sbmm, MLXSW_REG_SBMM_ID, MLXSW_REG_SBMM_LEN);
|
||||||
.id = MLXSW_REG_SBMM_ID,
|
|
||||||
.len = MLXSW_REG_SBMM_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_sbmm_prio
|
/* reg_sbmm_prio
|
||||||
* Switch Priority.
|
* Switch Priority.
|
||||||
@ -5135,10 +4969,7 @@ static inline void mlxsw_reg_sbmm_pack(char *payload, u8 prio, u32 min_buff,
|
|||||||
MLXSW_REG_SBSR_REC_LEN * \
|
MLXSW_REG_SBSR_REC_LEN * \
|
||||||
MLXSW_REG_SBSR_REC_MAX_COUNT)
|
MLXSW_REG_SBSR_REC_MAX_COUNT)
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sbsr = {
|
MLXSW_REG_DEFINE(sbsr, MLXSW_REG_SBSR_ID, MLXSW_REG_SBSR_LEN);
|
||||||
.id = MLXSW_REG_SBSR_ID,
|
|
||||||
.len = MLXSW_REG_SBSR_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_sbsr_clr
|
/* reg_sbsr_clr
|
||||||
* Clear Max Buffer Occupancy. When this bit is set, the max_buff_occupancy
|
* Clear Max Buffer Occupancy. When this bit is set, the max_buff_occupancy
|
||||||
@ -5228,10 +5059,7 @@ static inline void mlxsw_reg_sbsr_rec_unpack(char *payload, int rec_index,
|
|||||||
#define MLXSW_REG_SBIB_ID 0xB006
|
#define MLXSW_REG_SBIB_ID 0xB006
|
||||||
#define MLXSW_REG_SBIB_LEN 0x10
|
#define MLXSW_REG_SBIB_LEN 0x10
|
||||||
|
|
||||||
static const struct mlxsw_reg_info mlxsw_reg_sbib = {
|
MLXSW_REG_DEFINE(sbib, MLXSW_REG_SBIB_ID, MLXSW_REG_SBIB_LEN);
|
||||||
.id = MLXSW_REG_SBIB_ID,
|
|
||||||
.len = MLXSW_REG_SBIB_LEN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* reg_sbib_local_port
|
/* reg_sbib_local_port
|
||||||
* Local port number
|
* Local port number
|
||||||
@ -5256,132 +5084,80 @@ static inline void mlxsw_reg_sbib_pack(char *payload, u8 local_port,
|
|||||||
mlxsw_reg_sbib_buff_size_set(payload, buff_size);
|
mlxsw_reg_sbib_buff_size_set(payload, buff_size);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
|
||||||
|
MLXSW_REG(sgcr),
|
||||||
|
MLXSW_REG(spad),
|
||||||
|
MLXSW_REG(smid),
|
||||||
|
MLXSW_REG(sspr),
|
||||||
|
MLXSW_REG(sfdat),
|
||||||
|
MLXSW_REG(sfd),
|
||||||
|
MLXSW_REG(sfn),
|
||||||
|
MLXSW_REG(spms),
|
||||||
|
MLXSW_REG(spvid),
|
||||||
|
MLXSW_REG(spvm),
|
||||||
|
MLXSW_REG(spaft),
|
||||||
|
MLXSW_REG(sfgc),
|
||||||
|
MLXSW_REG(sftr),
|
||||||
|
MLXSW_REG(sfdf),
|
||||||
|
MLXSW_REG(sldr),
|
||||||
|
MLXSW_REG(slcr),
|
||||||
|
MLXSW_REG(slcor),
|
||||||
|
MLXSW_REG(spmlr),
|
||||||
|
MLXSW_REG(svfa),
|
||||||
|
MLXSW_REG(svpe),
|
||||||
|
MLXSW_REG(sfmr),
|
||||||
|
MLXSW_REG(spvmlr),
|
||||||
|
MLXSW_REG(qtct),
|
||||||
|
MLXSW_REG(qeec),
|
||||||
|
MLXSW_REG(pmlp),
|
||||||
|
MLXSW_REG(pmtu),
|
||||||
|
MLXSW_REG(ptys),
|
||||||
|
MLXSW_REG(ppad),
|
||||||
|
MLXSW_REG(paos),
|
||||||
|
MLXSW_REG(pfcc),
|
||||||
|
MLXSW_REG(ppcnt),
|
||||||
|
MLXSW_REG(pptb),
|
||||||
|
MLXSW_REG(pbmc),
|
||||||
|
MLXSW_REG(pspa),
|
||||||
|
MLXSW_REG(htgt),
|
||||||
|
MLXSW_REG(hpkt),
|
||||||
|
MLXSW_REG(rgcr),
|
||||||
|
MLXSW_REG(ritr),
|
||||||
|
MLXSW_REG(ratr),
|
||||||
|
MLXSW_REG(ralta),
|
||||||
|
MLXSW_REG(ralst),
|
||||||
|
MLXSW_REG(raltb),
|
||||||
|
MLXSW_REG(ralue),
|
||||||
|
MLXSW_REG(rauht),
|
||||||
|
MLXSW_REG(raleu),
|
||||||
|
MLXSW_REG(rauhtd),
|
||||||
|
MLXSW_REG(mfcr),
|
||||||
|
MLXSW_REG(mfsc),
|
||||||
|
MLXSW_REG(mfsm),
|
||||||
|
MLXSW_REG(mtcap),
|
||||||
|
MLXSW_REG(mtmp),
|
||||||
|
MLXSW_REG(mpat),
|
||||||
|
MLXSW_REG(mpar),
|
||||||
|
MLXSW_REG(mlcr),
|
||||||
|
MLXSW_REG(sbpr),
|
||||||
|
MLXSW_REG(sbcm),
|
||||||
|
MLXSW_REG(sbpm),
|
||||||
|
MLXSW_REG(sbmm),
|
||||||
|
MLXSW_REG(sbsr),
|
||||||
|
MLXSW_REG(sbib),
|
||||||
|
};
|
||||||
|
|
||||||
static inline const char *mlxsw_reg_id_str(u16 reg_id)
|
static inline const char *mlxsw_reg_id_str(u16 reg_id)
|
||||||
{
|
{
|
||||||
switch (reg_id) {
|
const struct mlxsw_reg_info *reg_info;
|
||||||
case MLXSW_REG_SGCR_ID:
|
int i;
|
||||||
return "SGCR";
|
|
||||||
case MLXSW_REG_SPAD_ID:
|
for (i = 0; i < ARRAY_SIZE(mlxsw_reg_infos); i++) {
|
||||||
return "SPAD";
|
reg_info = mlxsw_reg_infos[i];
|
||||||
case MLXSW_REG_SMID_ID:
|
if (reg_info->id == reg_id)
|
||||||
return "SMID";
|
return reg_info->name;
|
||||||
case MLXSW_REG_SSPR_ID:
|
|
||||||
return "SSPR";
|
|
||||||
case MLXSW_REG_SFDAT_ID:
|
|
||||||
return "SFDAT";
|
|
||||||
case MLXSW_REG_SFD_ID:
|
|
||||||
return "SFD";
|
|
||||||
case MLXSW_REG_SFN_ID:
|
|
||||||
return "SFN";
|
|
||||||
case MLXSW_REG_SPMS_ID:
|
|
||||||
return "SPMS";
|
|
||||||
case MLXSW_REG_SPVID_ID:
|
|
||||||
return "SPVID";
|
|
||||||
case MLXSW_REG_SPVM_ID:
|
|
||||||
return "SPVM";
|
|
||||||
case MLXSW_REG_SPAFT_ID:
|
|
||||||
return "SPAFT";
|
|
||||||
case MLXSW_REG_SFGC_ID:
|
|
||||||
return "SFGC";
|
|
||||||
case MLXSW_REG_SFTR_ID:
|
|
||||||
return "SFTR";
|
|
||||||
case MLXSW_REG_SFDF_ID:
|
|
||||||
return "SFDF";
|
|
||||||
case MLXSW_REG_SLDR_ID:
|
|
||||||
return "SLDR";
|
|
||||||
case MLXSW_REG_SLCR_ID:
|
|
||||||
return "SLCR";
|
|
||||||
case MLXSW_REG_SLCOR_ID:
|
|
||||||
return "SLCOR";
|
|
||||||
case MLXSW_REG_SPMLR_ID:
|
|
||||||
return "SPMLR";
|
|
||||||
case MLXSW_REG_SVFA_ID:
|
|
||||||
return "SVFA";
|
|
||||||
case MLXSW_REG_SVPE_ID:
|
|
||||||
return "SVPE";
|
|
||||||
case MLXSW_REG_SFMR_ID:
|
|
||||||
return "SFMR";
|
|
||||||
case MLXSW_REG_SPVMLR_ID:
|
|
||||||
return "SPVMLR";
|
|
||||||
case MLXSW_REG_QTCT_ID:
|
|
||||||
return "QTCT";
|
|
||||||
case MLXSW_REG_QEEC_ID:
|
|
||||||
return "QEEC";
|
|
||||||
case MLXSW_REG_PMLP_ID:
|
|
||||||
return "PMLP";
|
|
||||||
case MLXSW_REG_PMTU_ID:
|
|
||||||
return "PMTU";
|
|
||||||
case MLXSW_REG_PTYS_ID:
|
|
||||||
return "PTYS";
|
|
||||||
case MLXSW_REG_PPAD_ID:
|
|
||||||
return "PPAD";
|
|
||||||
case MLXSW_REG_PAOS_ID:
|
|
||||||
return "PAOS";
|
|
||||||
case MLXSW_REG_PFCC_ID:
|
|
||||||
return "PFCC";
|
|
||||||
case MLXSW_REG_PPCNT_ID:
|
|
||||||
return "PPCNT";
|
|
||||||
case MLXSW_REG_PPTB_ID:
|
|
||||||
return "PPTB";
|
|
||||||
case MLXSW_REG_PBMC_ID:
|
|
||||||
return "PBMC";
|
|
||||||
case MLXSW_REG_PSPA_ID:
|
|
||||||
return "PSPA";
|
|
||||||
case MLXSW_REG_HTGT_ID:
|
|
||||||
return "HTGT";
|
|
||||||
case MLXSW_REG_HPKT_ID:
|
|
||||||
return "HPKT";
|
|
||||||
case MLXSW_REG_RGCR_ID:
|
|
||||||
return "RGCR";
|
|
||||||
case MLXSW_REG_RITR_ID:
|
|
||||||
return "RITR";
|
|
||||||
case MLXSW_REG_RATR_ID:
|
|
||||||
return "RATR";
|
|
||||||
case MLXSW_REG_RALTA_ID:
|
|
||||||
return "RALTA";
|
|
||||||
case MLXSW_REG_RALST_ID:
|
|
||||||
return "RALST";
|
|
||||||
case MLXSW_REG_RALTB_ID:
|
|
||||||
return "RALTB";
|
|
||||||
case MLXSW_REG_RALUE_ID:
|
|
||||||
return "RALUE";
|
|
||||||
case MLXSW_REG_RAUHT_ID:
|
|
||||||
return "RAUHT";
|
|
||||||
case MLXSW_REG_RALEU_ID:
|
|
||||||
return "RALEU";
|
|
||||||
case MLXSW_REG_RAUHTD_ID:
|
|
||||||
return "RAUHTD";
|
|
||||||
case MLXSW_REG_MFCR_ID:
|
|
||||||
return "MFCR";
|
|
||||||
case MLXSW_REG_MFSC_ID:
|
|
||||||
return "MFSC";
|
|
||||||
case MLXSW_REG_MFSM_ID:
|
|
||||||
return "MFSM";
|
|
||||||
case MLXSW_REG_MTCAP_ID:
|
|
||||||
return "MTCAP";
|
|
||||||
case MLXSW_REG_MPAT_ID:
|
|
||||||
return "MPAT";
|
|
||||||
case MLXSW_REG_MPAR_ID:
|
|
||||||
return "MPAR";
|
|
||||||
case MLXSW_REG_MTMP_ID:
|
|
||||||
return "MTMP";
|
|
||||||
case MLXSW_REG_MLCR_ID:
|
|
||||||
return "MLCR";
|
|
||||||
case MLXSW_REG_SBPR_ID:
|
|
||||||
return "SBPR";
|
|
||||||
case MLXSW_REG_SBCM_ID:
|
|
||||||
return "SBCM";
|
|
||||||
case MLXSW_REG_SBPM_ID:
|
|
||||||
return "SBPM";
|
|
||||||
case MLXSW_REG_SBMM_ID:
|
|
||||||
return "SBMM";
|
|
||||||
case MLXSW_REG_SBSR_ID:
|
|
||||||
return "SBSR";
|
|
||||||
case MLXSW_REG_SBIB_ID:
|
|
||||||
return "SBIB";
|
|
||||||
default:
|
|
||||||
return "*UNKNOWN*";
|
|
||||||
}
|
}
|
||||||
|
return "*UNKNOWN*";
|
||||||
}
|
}
|
||||||
|
|
||||||
/* PUDE - Port Up / Down Event
|
/* PUDE - Port Up / Down Event
|
||||||
|
121
drivers/net/ethernet/mellanox/mlxsw/resources.h
Normal file
121
drivers/net/ethernet/mellanox/mlxsw/resources.h
Normal file
@ -0,0 +1,121 @@
|
|||||||
|
/*
|
||||||
|
* drivers/net/ethernet/mellanox/mlxsw/resources.h
|
||||||
|
* Copyright (c) 2016 Mellanox Technologies. All rights reserved.
|
||||||
|
* Copyright (c) 2016 Jiri Pirko <jiri@mellanox.com>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the names of the copyright holders nor the names of its
|
||||||
|
* contributors may be used to endorse or promote products derived from
|
||||||
|
* this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* Alternatively, this software may be distributed under the terms of the
|
||||||
|
* GNU General Public License ("GPL") version 2 as published by the Free
|
||||||
|
* Software Foundation.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||||
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||||
|
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||||
|
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||||
|
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||||
|
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||||
|
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _MLXSW_RESOURCES_H
|
||||||
|
#define _MLXSW_RESOURCES_H
|
||||||
|
|
||||||
|
#include <linux/kernel.h>
|
||||||
|
#include <linux/types.h>
|
||||||
|
|
||||||
|
enum mlxsw_res_id {
|
||||||
|
MLXSW_RES_ID_KVD_SIZE,
|
||||||
|
MLXSW_RES_ID_KVD_SINGLE_MIN_SIZE,
|
||||||
|
MLXSW_RES_ID_KVD_DOUBLE_MIN_SIZE,
|
||||||
|
MLXSW_RES_ID_MAX_SPAN,
|
||||||
|
MLXSW_RES_ID_MAX_SYSTEM_PORT,
|
||||||
|
MLXSW_RES_ID_MAX_LAG,
|
||||||
|
MLXSW_RES_ID_MAX_LAG_MEMBERS,
|
||||||
|
MLXSW_RES_ID_MAX_VRS,
|
||||||
|
MLXSW_RES_ID_MAX_RIFS,
|
||||||
|
|
||||||
|
/* Internal resources.
|
||||||
|
* Determined by the SW, not queried from the HW.
|
||||||
|
*/
|
||||||
|
MLXSW_RES_ID_KVD_SINGLE_SIZE,
|
||||||
|
MLXSW_RES_ID_KVD_DOUBLE_SIZE,
|
||||||
|
MLXSW_RES_ID_KVD_LINEAR_SIZE,
|
||||||
|
|
||||||
|
__MLXSW_RES_ID_MAX,
|
||||||
|
};
|
||||||
|
|
||||||
|
static u16 mlxsw_res_ids[] = {
|
||||||
|
[MLXSW_RES_ID_KVD_SIZE] = 0x1001,
|
||||||
|
[MLXSW_RES_ID_KVD_SINGLE_MIN_SIZE] = 0x1002,
|
||||||
|
[MLXSW_RES_ID_KVD_DOUBLE_MIN_SIZE] = 0x1003,
|
||||||
|
[MLXSW_RES_ID_MAX_SPAN] = 0x2420,
|
||||||
|
[MLXSW_RES_ID_MAX_SYSTEM_PORT] = 0x2502,
|
||||||
|
[MLXSW_RES_ID_MAX_LAG] = 0x2520,
|
||||||
|
[MLXSW_RES_ID_MAX_LAG_MEMBERS] = 0x2521,
|
||||||
|
[MLXSW_RES_ID_MAX_VRS] = 0x2C01,
|
||||||
|
[MLXSW_RES_ID_MAX_RIFS] = 0x2C02,
|
||||||
|
};
|
||||||
|
|
||||||
|
struct mlxsw_res {
|
||||||
|
bool valid[__MLXSW_RES_ID_MAX];
|
||||||
|
u64 values[__MLXSW_RES_ID_MAX];
|
||||||
|
};
|
||||||
|
|
||||||
|
static inline bool mlxsw_res_valid(struct mlxsw_res *res,
|
||||||
|
enum mlxsw_res_id res_id)
|
||||||
|
{
|
||||||
|
return res->valid[res_id];
|
||||||
|
}
|
||||||
|
|
||||||
|
#define MLXSW_RES_VALID(res, short_res_id) \
|
||||||
|
mlxsw_res_valid(res, MLXSW_RES_ID_##short_res_id)
|
||||||
|
|
||||||
|
static inline u64 mlxsw_res_get(struct mlxsw_res *res,
|
||||||
|
enum mlxsw_res_id res_id)
|
||||||
|
{
|
||||||
|
if (WARN_ON(!res->valid[res_id]))
|
||||||
|
return 0;
|
||||||
|
return res->values[res_id];
|
||||||
|
}
|
||||||
|
|
||||||
|
#define MLXSW_RES_GET(res, short_res_id) \
|
||||||
|
mlxsw_res_get(res, MLXSW_RES_ID_##short_res_id)
|
||||||
|
|
||||||
|
static inline void mlxsw_res_set(struct mlxsw_res *res,
|
||||||
|
enum mlxsw_res_id res_id, u64 value)
|
||||||
|
{
|
||||||
|
res->valid[res_id] = true;
|
||||||
|
res->values[res_id] = value;
|
||||||
|
}
|
||||||
|
|
||||||
|
#define MLXSW_RES_SET(res, short_res_id, value) \
|
||||||
|
mlxsw_res_set(res, MLXSW_RES_ID_##short_res_id, value)
|
||||||
|
|
||||||
|
static inline void mlxsw_res_parse(struct mlxsw_res *res, u16 id, u64 value)
|
||||||
|
{
|
||||||
|
int i;
|
||||||
|
|
||||||
|
for (i = 0; i < ARRAY_SIZE(mlxsw_res_ids); i++) {
|
||||||
|
if (mlxsw_res_ids[i] == id) {
|
||||||
|
mlxsw_res_set(res, i, value);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
@ -168,14 +168,13 @@ static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
|
|||||||
|
|
||||||
static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
|
static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
|
||||||
{
|
{
|
||||||
struct mlxsw_resources *resources;
|
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
|
||||||
if (!resources->max_span_valid)
|
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
|
||||||
mlxsw_sp->span.entries_count = resources->max_span;
|
mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
|
||||||
|
MAX_SPAN);
|
||||||
mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
|
mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
|
||||||
sizeof(struct mlxsw_sp_span_entry),
|
sizeof(struct mlxsw_sp_span_entry),
|
||||||
GFP_KERNEL);
|
GFP_KERNEL);
|
||||||
@ -1413,7 +1412,7 @@ static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
|
|||||||
|
|
||||||
struct mlxsw_sp_port_hw_stats {
|
struct mlxsw_sp_port_hw_stats {
|
||||||
char str[ETH_GSTRING_LEN];
|
char str[ETH_GSTRING_LEN];
|
||||||
u64 (*getter)(char *payload);
|
u64 (*getter)(const char *payload);
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
|
static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
|
||||||
@ -1534,7 +1533,7 @@ static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
|
|||||||
|
|
||||||
#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
|
#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
|
||||||
|
|
||||||
static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
|
static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(const char *ppcnt_pl)
|
||||||
{
|
{
|
||||||
u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
|
u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
|
||||||
|
|
||||||
@ -2892,7 +2891,6 @@ static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
|
|||||||
|
|
||||||
static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
|
static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
|
||||||
{
|
{
|
||||||
struct mlxsw_resources *resources;
|
|
||||||
char slcr_pl[MLXSW_REG_SLCR_LEN];
|
char slcr_pl[MLXSW_REG_SLCR_LEN];
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
@ -2909,11 +2907,11 @@ static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
|
|||||||
if (err)
|
if (err)
|
||||||
return err;
|
return err;
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
|
||||||
if (!(resources->max_lag_valid && resources->max_ports_in_lag_valid))
|
!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
|
||||||
mlxsw_sp->lags = kcalloc(resources->max_lag,
|
mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
|
||||||
sizeof(struct mlxsw_sp_upper),
|
sizeof(struct mlxsw_sp_upper),
|
||||||
GFP_KERNEL);
|
GFP_KERNEL);
|
||||||
if (!mlxsw_sp->lags)
|
if (!mlxsw_sp->lags)
|
||||||
@ -3183,11 +3181,9 @@ static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
|
|||||||
|
|
||||||
static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
|
static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
|
||||||
{
|
{
|
||||||
struct mlxsw_resources *resources;
|
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
|
||||||
for (i = 0; i < resources->max_rif; i++)
|
|
||||||
if (!mlxsw_sp->rifs[i])
|
if (!mlxsw_sp->rifs[i])
|
||||||
return i;
|
return i;
|
||||||
|
|
||||||
@ -3710,14 +3706,15 @@ static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
|
|||||||
struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
|
struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
|
||||||
u8 local_port = mlxsw_sp_port->local_port;
|
u8 local_port = mlxsw_sp_port->local_port;
|
||||||
u16 lag_id = mlxsw_sp_port->lag_id;
|
u16 lag_id = mlxsw_sp_port->lag_id;
|
||||||
struct mlxsw_resources *resources;
|
u64 max_lag_members;
|
||||||
int i, count = 0;
|
int i, count = 0;
|
||||||
|
|
||||||
if (!mlxsw_sp_port->lagged)
|
if (!mlxsw_sp_port->lagged)
|
||||||
return true;
|
return true;
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
|
||||||
for (i = 0; i < resources->max_ports_in_lag; i++) {
|
MAX_LAG_MEMBERS);
|
||||||
|
for (i = 0; i < max_lag_members; i++) {
|
||||||
struct mlxsw_sp_port *lag_port;
|
struct mlxsw_sp_port *lag_port;
|
||||||
|
|
||||||
lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
|
lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
|
||||||
@ -3923,13 +3920,13 @@ static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
|
|||||||
struct net_device *lag_dev,
|
struct net_device *lag_dev,
|
||||||
u16 *p_lag_id)
|
u16 *p_lag_id)
|
||||||
{
|
{
|
||||||
struct mlxsw_resources *resources;
|
|
||||||
struct mlxsw_sp_upper *lag;
|
struct mlxsw_sp_upper *lag;
|
||||||
int free_lag_id = -1;
|
int free_lag_id = -1;
|
||||||
|
u64 max_lag;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
|
||||||
for (i = 0; i < resources->max_lag; i++) {
|
for (i = 0; i < max_lag; i++) {
|
||||||
lag = mlxsw_sp_lag_get(mlxsw_sp, i);
|
lag = mlxsw_sp_lag_get(mlxsw_sp, i);
|
||||||
if (lag->ref_count) {
|
if (lag->ref_count) {
|
||||||
if (lag->dev == lag_dev) {
|
if (lag->dev == lag_dev) {
|
||||||
@ -3963,11 +3960,12 @@ mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
|
|||||||
static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
|
static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
|
||||||
u16 lag_id, u8 *p_port_index)
|
u16 lag_id, u8 *p_port_index)
|
||||||
{
|
{
|
||||||
struct mlxsw_resources *resources;
|
u64 max_lag_members;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
|
||||||
for (i = 0; i < resources->max_ports_in_lag; i++) {
|
MAX_LAG_MEMBERS);
|
||||||
|
for (i = 0; i < max_lag_members; i++) {
|
||||||
if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
|
if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
|
||||||
*p_port_index = i;
|
*p_port_index = i;
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -479,12 +479,9 @@ static inline struct mlxsw_sp_rif *
|
|||||||
mlxsw_sp_rif_find_by_dev(const struct mlxsw_sp *mlxsw_sp,
|
mlxsw_sp_rif_find_by_dev(const struct mlxsw_sp *mlxsw_sp,
|
||||||
const struct net_device *dev)
|
const struct net_device *dev)
|
||||||
{
|
{
|
||||||
struct mlxsw_resources *resources;
|
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
|
||||||
|
|
||||||
for (i = 0; i < resources->max_rif; i++)
|
|
||||||
if (mlxsw_sp->rifs[i] && mlxsw_sp->rifs[i]->dev == dev)
|
if (mlxsw_sp->rifs[i] && mlxsw_sp->rifs[i]->dev == dev)
|
||||||
return mlxsw_sp->rifs[i];
|
return mlxsw_sp->rifs[i];
|
||||||
|
|
||||||
|
@ -379,12 +379,10 @@ static void mlxsw_sp_lpm_init(struct mlxsw_sp *mlxsw_sp)
|
|||||||
|
|
||||||
static struct mlxsw_sp_vr *mlxsw_sp_vr_find_unused(struct mlxsw_sp *mlxsw_sp)
|
static struct mlxsw_sp_vr *mlxsw_sp_vr_find_unused(struct mlxsw_sp *mlxsw_sp)
|
||||||
{
|
{
|
||||||
struct mlxsw_resources *resources;
|
|
||||||
struct mlxsw_sp_vr *vr;
|
struct mlxsw_sp_vr *vr;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); i++) {
|
||||||
for (i = 0; i < resources->max_virtual_routers; i++) {
|
|
||||||
vr = &mlxsw_sp->router.vrs[i];
|
vr = &mlxsw_sp->router.vrs[i];
|
||||||
if (!vr->used)
|
if (!vr->used)
|
||||||
return vr;
|
return vr;
|
||||||
@ -426,14 +424,12 @@ static struct mlxsw_sp_vr *mlxsw_sp_vr_find(struct mlxsw_sp *mlxsw_sp,
|
|||||||
u32 tb_id,
|
u32 tb_id,
|
||||||
enum mlxsw_sp_l3proto proto)
|
enum mlxsw_sp_l3proto proto)
|
||||||
{
|
{
|
||||||
struct mlxsw_resources *resources;
|
|
||||||
struct mlxsw_sp_vr *vr;
|
struct mlxsw_sp_vr *vr;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
tb_id = mlxsw_sp_fix_tb_id(tb_id);
|
tb_id = mlxsw_sp_fix_tb_id(tb_id);
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); i++) {
|
||||||
for (i = 0; i < resources->max_virtual_routers; i++) {
|
|
||||||
vr = &mlxsw_sp->router.vrs[i];
|
vr = &mlxsw_sp->router.vrs[i];
|
||||||
if (vr->used && vr->proto == proto && vr->tb_id == tb_id)
|
if (vr->used && vr->proto == proto && vr->tb_id == tb_id)
|
||||||
return vr;
|
return vr;
|
||||||
@ -569,21 +565,20 @@ static void mlxsw_sp_vr_put(struct mlxsw_sp *mlxsw_sp, struct mlxsw_sp_vr *vr)
|
|||||||
|
|
||||||
static int mlxsw_sp_vrs_init(struct mlxsw_sp *mlxsw_sp)
|
static int mlxsw_sp_vrs_init(struct mlxsw_sp *mlxsw_sp)
|
||||||
{
|
{
|
||||||
struct mlxsw_resources *resources;
|
|
||||||
struct mlxsw_sp_vr *vr;
|
struct mlxsw_sp_vr *vr;
|
||||||
|
u64 max_vrs;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_VRS))
|
||||||
if (!resources->max_virtual_routers_valid)
|
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
|
||||||
mlxsw_sp->router.vrs = kcalloc(resources->max_virtual_routers,
|
max_vrs = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS);
|
||||||
sizeof(struct mlxsw_sp_vr),
|
mlxsw_sp->router.vrs = kcalloc(max_vrs, sizeof(struct mlxsw_sp_vr),
|
||||||
GFP_KERNEL);
|
GFP_KERNEL);
|
||||||
if (!mlxsw_sp->router.vrs)
|
if (!mlxsw_sp->router.vrs)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
for (i = 0; i < resources->max_virtual_routers; i++) {
|
for (i = 0; i < max_vrs; i++) {
|
||||||
vr = &mlxsw_sp->router.vrs[i];
|
vr = &mlxsw_sp->router.vrs[i];
|
||||||
vr->id = i;
|
vr->id = i;
|
||||||
}
|
}
|
||||||
@ -1875,15 +1870,13 @@ static int mlxsw_sp_router_set_abort_trap(struct mlxsw_sp *mlxsw_sp)
|
|||||||
|
|
||||||
static void mlxsw_sp_router_fib4_abort(struct mlxsw_sp *mlxsw_sp)
|
static void mlxsw_sp_router_fib4_abort(struct mlxsw_sp *mlxsw_sp)
|
||||||
{
|
{
|
||||||
struct mlxsw_resources *resources;
|
|
||||||
struct mlxsw_sp_fib_entry *fib_entry;
|
struct mlxsw_sp_fib_entry *fib_entry;
|
||||||
struct mlxsw_sp_fib_entry *tmp;
|
struct mlxsw_sp_fib_entry *tmp;
|
||||||
struct mlxsw_sp_vr *vr;
|
struct mlxsw_sp_vr *vr;
|
||||||
int i;
|
int i;
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); i++) {
|
||||||
for (i = 0; i < resources->max_virtual_routers; i++) {
|
|
||||||
vr = &mlxsw_sp->router.vrs[i];
|
vr = &mlxsw_sp->router.vrs[i];
|
||||||
if (!vr->used)
|
if (!vr->used)
|
||||||
continue;
|
continue;
|
||||||
@ -1908,21 +1901,21 @@ static void mlxsw_sp_router_fib4_abort(struct mlxsw_sp *mlxsw_sp)
|
|||||||
|
|
||||||
static int __mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp)
|
static int __mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp)
|
||||||
{
|
{
|
||||||
struct mlxsw_resources *resources;
|
|
||||||
char rgcr_pl[MLXSW_REG_RGCR_LEN];
|
char rgcr_pl[MLXSW_REG_RGCR_LEN];
|
||||||
|
u64 max_rifs;
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_RIFS))
|
||||||
if (!resources->max_rif_valid)
|
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
|
||||||
mlxsw_sp->rifs = kcalloc(resources->max_rif,
|
max_rifs = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS);
|
||||||
sizeof(struct mlxsw_sp_rif *), GFP_KERNEL);
|
mlxsw_sp->rifs = kcalloc(max_rifs, sizeof(struct mlxsw_sp_rif *),
|
||||||
|
GFP_KERNEL);
|
||||||
if (!mlxsw_sp->rifs)
|
if (!mlxsw_sp->rifs)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
mlxsw_reg_rgcr_pack(rgcr_pl, true);
|
mlxsw_reg_rgcr_pack(rgcr_pl, true);
|
||||||
mlxsw_reg_rgcr_max_router_interfaces_set(rgcr_pl, resources->max_rif);
|
mlxsw_reg_rgcr_max_router_interfaces_set(rgcr_pl, max_rifs);
|
||||||
err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rgcr), rgcr_pl);
|
err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rgcr), rgcr_pl);
|
||||||
if (err)
|
if (err)
|
||||||
goto err_rgcr_fail;
|
goto err_rgcr_fail;
|
||||||
@ -1936,15 +1929,13 @@ static int __mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp)
|
|||||||
|
|
||||||
static void __mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp)
|
static void __mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp)
|
||||||
{
|
{
|
||||||
struct mlxsw_resources *resources;
|
|
||||||
char rgcr_pl[MLXSW_REG_RGCR_LEN];
|
char rgcr_pl[MLXSW_REG_RGCR_LEN];
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
mlxsw_reg_rgcr_pack(rgcr_pl, false);
|
mlxsw_reg_rgcr_pack(rgcr_pl, false);
|
||||||
mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rgcr), rgcr_pl);
|
mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rgcr), rgcr_pl);
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
|
||||||
for (i = 0; i < resources->max_rif; i++)
|
|
||||||
WARN_ON_ONCE(mlxsw_sp->rifs[i]);
|
WARN_ON_ONCE(mlxsw_sp->rifs[i]);
|
||||||
|
|
||||||
kfree(mlxsw_sp->rifs);
|
kfree(mlxsw_sp->rifs);
|
||||||
|
@ -1196,11 +1196,12 @@ static struct mlxsw_sp_port *mlxsw_sp_lag_rep_port(struct mlxsw_sp *mlxsw_sp,
|
|||||||
u16 lag_id)
|
u16 lag_id)
|
||||||
{
|
{
|
||||||
struct mlxsw_sp_port *mlxsw_sp_port;
|
struct mlxsw_sp_port *mlxsw_sp_port;
|
||||||
struct mlxsw_resources *resources;
|
u64 max_lag_members;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
|
||||||
for (i = 0; i < resources->max_ports_in_lag; i++) {
|
MAX_LAG_MEMBERS);
|
||||||
|
for (i = 0; i < max_lag_members; i++) {
|
||||||
mlxsw_sp_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
|
mlxsw_sp_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
|
||||||
if (mlxsw_sp_port)
|
if (mlxsw_sp_port)
|
||||||
return mlxsw_sp_port;
|
return mlxsw_sp_port;
|
||||||
|
@ -410,7 +410,7 @@ static void mlxsw_sx_port_get_drvinfo(struct net_device *dev,
|
|||||||
|
|
||||||
struct mlxsw_sx_port_hw_stats {
|
struct mlxsw_sx_port_hw_stats {
|
||||||
char str[ETH_GSTRING_LEN];
|
char str[ETH_GSTRING_LEN];
|
||||||
u64 (*getter)(char *payload);
|
u64 (*getter)(const char *payload);
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct mlxsw_sx_port_hw_stats mlxsw_sx_port_hw_stats[] = {
|
static const struct mlxsw_sx_port_hw_stats mlxsw_sx_port_hw_stats[] = {
|
||||||
|
Loading…
Reference in New Issue
Block a user