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drm/amd/display: hide inconsistent mpcc programming from dtn log

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Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin 2018-03-15 10:25:43 -04:00 committed by Alex Deucher
parent 4173c0bdd7
commit 1ba2faf207
1 changed files with 5 additions and 4 deletions
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9
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
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@ -157,10 +157,11 @@ void dcn10_log_hw_state(struct dc *dc)
struct mpcc_state s = {0};
pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s);
DTN_INFO("[%2d]: %2xh %2xh %6xh %4d %10d %7d %12d %4d\n",
i, s.opp_id, s.dpp_id, s.bot_mpcc_id,
s.mode, s.alpha_mode, s.pre_multiplied_alpha, s.overlap_only,
s.idle);
if (s.opp_id != 0xf)
DTN_INFO("[%2d]: %2xh %2xh %6xh %4d %10d %7d %12d %4d\n",
i, s.opp_id, s.dpp_id, s.bot_mpcc_id,
s.mode, s.alpha_mode, s.pre_multiplied_alpha, s.overlap_only,
s.idle);
}
DTN_INFO("\n");