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rsi: configure new boot parameters to device

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Boot parameters are changed in new firmware. Also three
new sdio sleep parameters are added for ultra low power
save.

Signed-off-by: Prameela Rani Garnepudi <prameela.j04cs@gmail.com>
Signed-off-by: Amitkumar Karwar <amit.karwar@redpinesignals.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Prameela Rani Garnepudi 2017-06-16 20:05:40 +05:30 committed by Kalle Valo
parent 61f2a6fcaa
commit 1b1bed0165
2 changed files with 22 additions and 13 deletions
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20
drivers/net/wireless/rsi/rsi_91x_mgmt.c
View File

@ -45,10 +45,10 @@ static struct bootup_params boot_params_20 = {
}
},
.switch_clk_g = {
.switch_clk_info = cpu_to_le16(BIT(3)),
.bbp_lmac_clk_reg_val = cpu_to_le16(0x121),
.umac_clock_reg_config = 0x0,
.qspi_uart_clock_reg_config = 0x0
.switch_clk_info = cpu_to_le16(0xb),
.bbp_lmac_clk_reg_val = cpu_to_le16(0x111),
.umac_clock_reg_config = cpu_to_le16(0x48),
.qspi_uart_clock_reg_config = cpu_to_le16(0x1211)
}
},
{
@ -106,7 +106,10 @@ static struct bootup_params boot_params_20 = {
.wdt_prog_value = 0x0,
.wdt_soc_rst_delay = 0x0,
.dcdc_operation_mode = 0x0,
.soc_reset_wait_cnt = 0x0
.soc_reset_wait_cnt = 0x0,
.waiting_time_at_fresh_sleep = 0x0,
.max_threshold_to_avoid_sleep = 0x0,
.beacon_resedue_alg_en = 0,
};
static struct bootup_params boot_params_40 = {
@ -139,7 +142,7 @@ static struct bootup_params boot_params_40 = {
.switch_clk_info = cpu_to_le16(0x09),
.bbp_lmac_clk_reg_val = cpu_to_le16(0x1121),
.umac_clock_reg_config = cpu_to_le16(0x48),
.qspi_uart_clock_reg_config = 0x0
.qspi_uart_clock_reg_config = cpu_to_le16(0x1211)
}
},
{
@ -197,7 +200,10 @@ static struct bootup_params boot_params_40 = {
.wdt_prog_value = 0x0,
.wdt_soc_rst_delay = 0x0,
.dcdc_operation_mode = 0x0,
.soc_reset_wait_cnt = 0x0
.soc_reset_wait_cnt = 0x0,
.waiting_time_at_fresh_sleep = 0x0,
.max_threshold_to_avoid_sleep = 0x0,
.beacon_resedue_alg_en = 0,
};
static u16 mcs[] = {13, 26, 39, 52, 78, 104, 117, 130};

15
drivers/net/wireless/rsi/rsi_boot_params.h
View File

@ -24,19 +24,19 @@
#define WIFI_AFEPLL_CONFIGS BIT(7)
#define WIFI_SWITCH_CLK_CONFIGS BIT(8)
#define TA_PLL_M_VAL_20 8
#define TA_PLL_N_VAL_20 1
#define TA_PLL_M_VAL_20 9
#define TA_PLL_N_VAL_20 0
#define TA_PLL_P_VAL_20 4
#define PLL960_M_VAL_20 0x14
#define PLL960_N_VAL_20 0
#define PLL960_P_VAL_20 5
#define UMAC_CLK_40MHZ 40
#define UMAC_CLK_40MHZ 80
#define TA_PLL_M_VAL_40 46
#define TA_PLL_N_VAL_40 3
#define TA_PLL_P_VAL_40 3
#define TA_PLL_M_VAL_40 9
#define TA_PLL_N_VAL_40 0
#define TA_PLL_P_VAL_40 4
#define PLL960_M_VAL_40 0x14
#define PLL960_N_VAL_40 0
@ -122,5 +122,8 @@ struct bootup_params {
/* dcdc modes configs */
__le32 dcdc_operation_mode;
__le32 soc_reset_wait_cnt;
__le32 waiting_time_at_fresh_sleep;
__le32 max_threshold_to_avoid_sleep;
u8 beacon_resedue_alg_en;
} __packed;
#endif