From 1ab6962794b4225b67bc3b6449f11a126f455fff Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Zintis=20P=C4=93tersons?= Date: Mon, 14 Feb 2011 18:38:13 +0200 Subject: [PATCH] [ARM] Kirkwood: initialize PCIE1 for QNAP TS-419P+ MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Initialize PCIE1 on the 6282-based QNAP TS-419P+ since it has a Marvell 9125 SATA chip on each PCI bus. Signed-off-by: Zintis PÄ“tersons Signed-off-by: Nicolas Pitre --- arch/arm/mach-kirkwood/ts41x-setup.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c index 9a44029915e2..0f84e0af397f 100644 --- a/arch/arm/mach-kirkwood/ts41x-setup.c +++ b/arch/arm/mach-kirkwood/ts41x-setup.c @@ -154,6 +154,8 @@ static void __init qnap_ts41x_init(void) static int __init ts41x_pci_init(void) { if (machine_is_ts41x()) { + u32 dev, rev; + /* * Without this explicit reset, the PCIe SATA controller * (Marvell 88sx7042/sata_mv) is known to stop working @@ -161,7 +163,11 @@ static int __init ts41x_pci_init(void) */ orion_pcie_reset((void __iomem *)PCIE_VIRT_BASE); - kirkwood_pcie_init(KW_PCIE0); + kirkwood_pcie_id(&dev, &rev); + if (dev == MV88F6282_DEV_ID) + kirkwood_pcie_init(KW_PCIE1 | KW_PCIE0); + else + kirkwood_pcie_init(KW_PCIE0); } return 0;