From 1a9cd8f36d0617630b4f0ae2601fe5600edff109 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Sun, 6 Nov 2016 22:52:39 +0100 Subject: [PATCH] ARM: dts: armada-xp-matrix: Fix the location of the pcie-controller node In the dts for the Marvell Armada XP Matrix board the pcie-controller was located under the internal-regs node whereas it belongs to the soc node. It means that, until this fix, the pcie could not work for this board because it didn't match the definition of the pcie-controller node in the dtsi file. If we had a look on the decompiled dtb file we saw two different instances of the pcie-controller node: one with the all the resource set but disabled and the other without any resource but enabled. Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/armada-xp-matrix.dts | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/armada-xp-matrix.dts b/arch/arm/boot/dts/armada-xp-matrix.dts index 6522b04f4a8e..e1509f4c5114 100644 --- a/arch/arm/boot/dts/armada-xp-matrix.dts +++ b/arch/arm/boot/dts/armada-xp-matrix.dts @@ -71,6 +71,15 @@ MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>; + pcie-controller { + status = "okay"; + + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + }; + internal-regs { serial@12000 { status = "okay"; @@ -99,15 +108,6 @@ fixed-link { }; }; - pcie-controller { - status = "okay"; - - pcie@1,0 { - /* Port 0, Lane 0 */ - status = "okay"; - }; - }; - usb@50000 { status = "okay"; };