mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 01:46:51 +07:00
bna: use BIT(x) instead of (1 << x)
Signed-off-by: Ivan Vecera <ivecera@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ivan Vecera
David S. Miller
parent
a1ac490d0d
commit
1a50691a95
@ -75,7 +75,7 @@ enum {
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CB_GPIO_FC4P2 = (4), /*!< 4G 2port FC card */
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CB_GPIO_FC4P1 = (5), /*!< 4G 1port FC card */
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CB_GPIO_DFLY = (6), /*!< 8G 2port FC mezzanine card */
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CB_GPIO_PROTO = (1 << 7) /*!< 8G 2port FC prototypes */
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CB_GPIO_PROTO = BIT(7) /*!< 8G 2port FC prototypes */
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};
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#define bfa_mfg_adapter_prop_init_gpio(gpio, card_type, prop) \
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@ -24,7 +24,7 @@
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#include "bfa_defs.h"
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#define bfa_ioc_ct_sync_pos(__ioc) \
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((u32) (1 << bfa_ioc_pcifn(__ioc)))
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((u32)BIT(bfa_ioc_pcifn(__ioc)))
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#define BFA_IOC_SYNC_REQD_SH 16
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#define bfa_ioc_ct_get_sync_ackd(__val) (__val & 0x0000ffff)
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#define bfa_ioc_ct_clear_sync_ackd(__val) (__val & 0xffff0000)
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@ -68,13 +68,13 @@ union bfi_addr_be_u {
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#define BFI_ENET_TXQ_WI_EXTENSION (0x104) /* Extension WI */
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/* TxQ Entry Control Flags */
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#define BFI_ENET_TXQ_WI_CF_FCOE_CRC (1 << 8)
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#define BFI_ENET_TXQ_WI_CF_IPID_MODE (1 << 5)
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#define BFI_ENET_TXQ_WI_CF_INS_PRIO (1 << 4)
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#define BFI_ENET_TXQ_WI_CF_INS_VLAN (1 << 3)
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#define BFI_ENET_TXQ_WI_CF_UDP_CKSUM (1 << 2)
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#define BFI_ENET_TXQ_WI_CF_TCP_CKSUM (1 << 1)
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#define BFI_ENET_TXQ_WI_CF_IP_CKSUM (1 << 0)
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#define BFI_ENET_TXQ_WI_CF_FCOE_CRC BIT(8)
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#define BFI_ENET_TXQ_WI_CF_IPID_MODE BIT(5)
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#define BFI_ENET_TXQ_WI_CF_INS_PRIO BIT(4)
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#define BFI_ENET_TXQ_WI_CF_INS_VLAN BIT(3)
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#define BFI_ENET_TXQ_WI_CF_UDP_CKSUM BIT(2)
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#define BFI_ENET_TXQ_WI_CF_TCP_CKSUM BIT(1)
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#define BFI_ENET_TXQ_WI_CF_IP_CKSUM BIT(0)
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struct bfi_enet_txq_wi_base {
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u8 reserved;
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@ -122,32 +122,32 @@ struct bfi_enet_rxq_entry {
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/* R X C O M P L E T I O N Q U E U E D E F I N E S */
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/* CQ Entry Flags */
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#define BFI_ENET_CQ_EF_MAC_ERROR (1 << 0)
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#define BFI_ENET_CQ_EF_FCS_ERROR (1 << 1)
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#define BFI_ENET_CQ_EF_TOO_LONG (1 << 2)
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#define BFI_ENET_CQ_EF_FC_CRC_OK (1 << 3)
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#define BFI_ENET_CQ_EF_MAC_ERROR BIT(0)
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#define BFI_ENET_CQ_EF_FCS_ERROR BIT(1)
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#define BFI_ENET_CQ_EF_TOO_LONG BIT(2)
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#define BFI_ENET_CQ_EF_FC_CRC_OK BIT(3)
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#define BFI_ENET_CQ_EF_RSVD1 (1 << 4)
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#define BFI_ENET_CQ_EF_L4_CKSUM_OK (1 << 5)
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#define BFI_ENET_CQ_EF_L3_CKSUM_OK (1 << 6)
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#define BFI_ENET_CQ_EF_HDS_HEADER (1 << 7)
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#define BFI_ENET_CQ_EF_RSVD1 BIT(4)
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#define BFI_ENET_CQ_EF_L4_CKSUM_OK BIT(5)
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#define BFI_ENET_CQ_EF_L3_CKSUM_OK BIT(6)
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#define BFI_ENET_CQ_EF_HDS_HEADER BIT(7)
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#define BFI_ENET_CQ_EF_UDP (1 << 8)
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#define BFI_ENET_CQ_EF_TCP (1 << 9)
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#define BFI_ENET_CQ_EF_IP_OPTIONS (1 << 10)
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#define BFI_ENET_CQ_EF_IPV6 (1 << 11)
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#define BFI_ENET_CQ_EF_UDP BIT(8)
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#define BFI_ENET_CQ_EF_TCP BIT(9)
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#define BFI_ENET_CQ_EF_IP_OPTIONS BIT(10)
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#define BFI_ENET_CQ_EF_IPV6 BIT(11)
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#define BFI_ENET_CQ_EF_IPV4 (1 << 12)
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#define BFI_ENET_CQ_EF_VLAN (1 << 13)
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#define BFI_ENET_CQ_EF_RSS (1 << 14)
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#define BFI_ENET_CQ_EF_RSVD2 (1 << 15)
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#define BFI_ENET_CQ_EF_IPV4 BIT(12)
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#define BFI_ENET_CQ_EF_VLAN BIT(13)
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#define BFI_ENET_CQ_EF_RSS BIT(14)
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#define BFI_ENET_CQ_EF_RSVD2 BIT(15)
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#define BFI_ENET_CQ_EF_MCAST_MATCH (1 << 16)
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#define BFI_ENET_CQ_EF_MCAST (1 << 17)
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#define BFI_ENET_CQ_EF_BCAST (1 << 18)
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#define BFI_ENET_CQ_EF_REMOTE (1 << 19)
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#define BFI_ENET_CQ_EF_MCAST_MATCH BIT(16)
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#define BFI_ENET_CQ_EF_MCAST BIT(17)
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#define BFI_ENET_CQ_EF_BCAST BIT(18)
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#define BFI_ENET_CQ_EF_REMOTE BIT(19)
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#define BFI_ENET_CQ_EF_LOCAL (1 << 20)
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#define BFI_ENET_CQ_EF_LOCAL BIT(20)
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/* CQ Entry Structure */
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struct bfi_enet_cq_entry {
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@ -672,11 +672,11 @@ struct bfi_enet_stats_req {
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} __packed;
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/* defines for "stats_mask" above. */
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#define BFI_ENET_STATS_MAC (1 << 0) /* !< MAC Statistics */
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#define BFI_ENET_STATS_BPC (1 << 1) /* !< Pause Stats from BPC */
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#define BFI_ENET_STATS_RAD (1 << 2) /* !< Rx Admission Statistics */
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#define BFI_ENET_STATS_RX_FC (1 << 3) /* !< Rx FC Stats from RxA */
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#define BFI_ENET_STATS_TX_FC (1 << 4) /* !< Tx FC Stats from TxA */
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#define BFI_ENET_STATS_MAC BIT(0) /* !< MAC Statistics */
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#define BFI_ENET_STATS_BPC BIT(1) /* !< Pause Stats from BPC */
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#define BFI_ENET_STATS_RAD BIT(2) /* !< Rx Admission Statistics */
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#define BFI_ENET_STATS_RX_FC BIT(3) /* !< Rx FC Stats from RxA */
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#define BFI_ENET_STATS_TX_FC BIT(4) /* !< Tx FC Stats from TxA */
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#define BFI_ENET_STATS_ALL 0x1f
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@ -207,7 +207,7 @@ bna_bfi_stats_get_rsp(struct bna *bna, struct bfi_msgq_mhdr *msghdr)
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for (i = 0; i < BFI_ENET_CFG_MAX; i++) {
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stats_dst = (u64 *)&(bna->stats.hw_stats.rxf_stats[i]);
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memset(stats_dst, 0, sizeof(struct bfi_enet_stats_rxf));
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if (rx_enet_mask & ((u32)(1 << i))) {
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if (rx_enet_mask & ((u32)BIT(i))) {
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int k;
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count = sizeof(struct bfi_enet_stats_rxf) /
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sizeof(u64);
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@ -222,7 +222,7 @@ bna_bfi_stats_get_rsp(struct bna *bna, struct bfi_msgq_mhdr *msghdr)
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for (i = 0; i < BFI_ENET_CFG_MAX; i++) {
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stats_dst = (u64 *)&(bna->stats.hw_stats.txf_stats[i]);
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memset(stats_dst, 0, sizeof(struct bfi_enet_stats_txf));
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if (tx_enet_mask & ((u32)(1 << i))) {
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if (tx_enet_mask & ((u32)BIT(i))) {
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int k;
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count = sizeof(struct bfi_enet_stats_txf) /
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sizeof(u64);
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@ -213,7 +213,7 @@ do { \
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* 15 bits (32K) should be large enough to accumulate, anyways, and the max.
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* acked events to h/w can be (32K + max poll weight) (currently 64).
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*/
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#define BNA_IB_MAX_ACK_EVENTS (1 << 15)
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#define BNA_IB_MAX_ACK_EVENTS BIT(15)
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/* These macros build the data portion of the TxQ/RxQ doorbell */
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#define BNA_DOORBELL_Q_PRD_IDX(_pi) (0x80000000 | (_pi))
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@ -282,13 +282,13 @@ do { \
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#define BNA_TXQ_WI_EXTENSION (0x104) /* Extension WI */
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/* TxQ Entry Control Flags */
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#define BNA_TXQ_WI_CF_FCOE_CRC (1 << 8)
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#define BNA_TXQ_WI_CF_IPID_MODE (1 << 5)
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#define BNA_TXQ_WI_CF_INS_PRIO (1 << 4)
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#define BNA_TXQ_WI_CF_INS_VLAN (1 << 3)
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#define BNA_TXQ_WI_CF_UDP_CKSUM (1 << 2)
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#define BNA_TXQ_WI_CF_TCP_CKSUM (1 << 1)
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#define BNA_TXQ_WI_CF_IP_CKSUM (1 << 0)
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#define BNA_TXQ_WI_CF_FCOE_CRC BIT(8)
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#define BNA_TXQ_WI_CF_IPID_MODE BIT(5)
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#define BNA_TXQ_WI_CF_INS_PRIO BIT(4)
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#define BNA_TXQ_WI_CF_INS_VLAN BIT(3)
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#define BNA_TXQ_WI_CF_UDP_CKSUM BIT(2)
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#define BNA_TXQ_WI_CF_TCP_CKSUM BIT(1)
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#define BNA_TXQ_WI_CF_IP_CKSUM BIT(0)
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#define BNA_TXQ_WI_L4_HDR_N_OFFSET(_hdr_size, _offset) \
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(((_hdr_size) << 10) | ((_offset) & 0x3FF))
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@ -297,36 +297,36 @@ do { \
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* Completion Q defines
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*/
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/* CQ Entry Flags */
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#define BNA_CQ_EF_MAC_ERROR (1 << 0)
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#define BNA_CQ_EF_FCS_ERROR (1 << 1)
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#define BNA_CQ_EF_TOO_LONG (1 << 2)
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#define BNA_CQ_EF_FC_CRC_OK (1 << 3)
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#define BNA_CQ_EF_MAC_ERROR BIT(0)
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#define BNA_CQ_EF_FCS_ERROR BIT(1)
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#define BNA_CQ_EF_TOO_LONG BIT(2)
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#define BNA_CQ_EF_FC_CRC_OK BIT(3)
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#define BNA_CQ_EF_RSVD1 (1 << 4)
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#define BNA_CQ_EF_L4_CKSUM_OK (1 << 5)
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#define BNA_CQ_EF_L3_CKSUM_OK (1 << 6)
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#define BNA_CQ_EF_HDS_HEADER (1 << 7)
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#define BNA_CQ_EF_RSVD1 BIT(4)
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#define BNA_CQ_EF_L4_CKSUM_OK BIT(5)
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#define BNA_CQ_EF_L3_CKSUM_OK BIT(6)
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#define BNA_CQ_EF_HDS_HEADER BIT(7)
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#define BNA_CQ_EF_UDP (1 << 8)
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#define BNA_CQ_EF_TCP (1 << 9)
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#define BNA_CQ_EF_IP_OPTIONS (1 << 10)
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#define BNA_CQ_EF_IPV6 (1 << 11)
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#define BNA_CQ_EF_UDP BIT(8)
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#define BNA_CQ_EF_TCP BIT(9)
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#define BNA_CQ_EF_IP_OPTIONS BIT(10)
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#define BNA_CQ_EF_IPV6 BIT(11)
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#define BNA_CQ_EF_IPV4 (1 << 12)
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#define BNA_CQ_EF_VLAN (1 << 13)
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#define BNA_CQ_EF_RSS (1 << 14)
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#define BNA_CQ_EF_RSVD2 (1 << 15)
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#define BNA_CQ_EF_IPV4 BIT(12)
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#define BNA_CQ_EF_VLAN BIT(13)
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#define BNA_CQ_EF_RSS BIT(14)
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#define BNA_CQ_EF_RSVD2 BIT(15)
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#define BNA_CQ_EF_MCAST_MATCH (1 << 16)
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#define BNA_CQ_EF_MCAST (1 << 17)
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#define BNA_CQ_EF_BCAST (1 << 18)
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#define BNA_CQ_EF_REMOTE (1 << 19)
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#define BNA_CQ_EF_MCAST_MATCH BIT(16)
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#define BNA_CQ_EF_MCAST BIT(17)
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#define BNA_CQ_EF_BCAST BIT(18)
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#define BNA_CQ_EF_REMOTE BIT(19)
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#define BNA_CQ_EF_LOCAL (1 << 20)
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#define BNA_CQ_EF_LOCAL BIT(20)
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/* CAT2 ASIC does not use bit 21 as per the SPEC.
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* Bit 31 is set in every end of frame completion
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*/
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#define BNA_CQ_EF_EOP (1 << 31)
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#define BNA_CQ_EF_EOP BIT(31)
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/* Data structures */
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@ -566,7 +566,7 @@ bna_rxf_vlan_cfg_apply(struct bna_rxf *rxf)
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block_idx++;
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vlan_pending_bitmask >>= 1;
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}
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rxf->vlan_pending_bitmask &= ~(1 << block_idx);
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rxf->vlan_pending_bitmask &= ~BIT(block_idx);
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bna_bfi_rx_vlan_filter_set(rxf, block_idx);
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return 1;
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}
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@ -1105,12 +1105,12 @@ bna_rx_vlan_add(struct bna_rx *rx, int vlan_id)
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{
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struct bna_rxf *rxf = &rx->rxf;
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int index = (vlan_id >> BFI_VLAN_WORD_SHIFT);
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int bit = (1 << (vlan_id & BFI_VLAN_WORD_MASK));
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int bit = BIT((vlan_id & BFI_VLAN_WORD_MASK));
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int group_id = (vlan_id >> BFI_VLAN_BLOCK_SHIFT);
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rxf->vlan_filter_table[index] |= bit;
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if (rxf->vlan_filter_status == BNA_STATUS_T_ENABLED) {
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rxf->vlan_pending_bitmask |= (1 << group_id);
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rxf->vlan_pending_bitmask |= BIT(group_id);
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bfa_fsm_send_event(rxf, RXF_E_CONFIG);
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}
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}
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@ -1120,12 +1120,12 @@ bna_rx_vlan_del(struct bna_rx *rx, int vlan_id)
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{
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struct bna_rxf *rxf = &rx->rxf;
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int index = (vlan_id >> BFI_VLAN_WORD_SHIFT);
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int bit = (1 << (vlan_id & BFI_VLAN_WORD_MASK));
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int bit = BIT((vlan_id & BFI_VLAN_WORD_MASK));
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int group_id = (vlan_id >> BFI_VLAN_BLOCK_SHIFT);
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rxf->vlan_filter_table[index] &= ~bit;
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if (rxf->vlan_filter_status == BNA_STATUS_T_ENABLED) {
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rxf->vlan_pending_bitmask |= (1 << group_id);
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rxf->vlan_pending_bitmask |= BIT(group_id);
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bfa_fsm_send_event(rxf, RXF_E_CONFIG);
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}
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}
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@ -2619,7 +2619,7 @@ bna_rx_create(struct bna *bna, struct bnad *bnad,
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if (intr_info->intr_type == BNA_INTR_T_MSIX)
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rxp->cq.ib.intr_vector = rxp->vector;
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else
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rxp->cq.ib.intr_vector = (1 << rxp->vector);
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rxp->cq.ib.intr_vector = BIT(rxp->vector);
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rxp->cq.ib.coalescing_timeo = rx_cfg->coalescing_timeo;
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rxp->cq.ib.interpkt_count = BFI_RX_INTERPKT_COUNT;
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rxp->cq.ib.interpkt_timeo = BFI_RX_INTERPKT_TIMEO;
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@ -2724,7 +2724,7 @@ bna_rx_create(struct bna *bna, struct bnad *bnad,
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bfa_fsm_set_state(rx, bna_rx_sm_stopped);
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rx_mod->rid_mask |= (1 << rx->rid);
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rx_mod->rid_mask |= BIT(rx->rid);
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return rx;
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}
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@ -2776,7 +2776,7 @@ bna_rx_destroy(struct bna_rx *rx)
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}
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}
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rx_mod->rid_mask &= ~(1 << rx->rid);
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rx_mod->rid_mask &= ~BIT(rx->rid);
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rx->bna = NULL;
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rx->priv = NULL;
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@ -3778,7 +3778,7 @@ bna_tx_create(struct bna *bna, struct bnad *bnad,
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intr_info->idl[0].vector :
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intr_info->idl[i].vector;
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if (intr_info->intr_type == BNA_INTR_T_INTX)
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txq->ib.intr_vector = (1 << txq->ib.intr_vector);
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txq->ib.intr_vector = BIT(txq->ib.intr_vector);
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txq->ib.coalescing_timeo = tx_cfg->coalescing_timeo;
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txq->ib.interpkt_timeo = BFI_TX_INTERPKT_TIMEO;
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txq->ib.interpkt_count = BFI_TX_INTERPKT_COUNT;
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@ -3820,7 +3820,7 @@ bna_tx_create(struct bna *bna, struct bnad *bnad,
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bfa_fsm_set_state(tx, bna_tx_sm_stopped);
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tx_mod->rid_mask |= (1 << tx->rid);
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tx_mod->rid_mask |= BIT(tx->rid);
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return tx;
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@ -3841,7 +3841,7 @@ bna_tx_destroy(struct bna_tx *tx)
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(tx->tcb_destroy_cbfn)(tx->bna->bnad, txq->tcb);
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}
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tx->bna->tx_mod.rid_mask &= ~(1 << tx->rid);
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tx->bna->tx_mod.rid_mask &= ~BIT(tx->rid);
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bna_tx_free(tx);
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}
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