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ARM: SAMSUNG: Add adc registers for S3C2443/S3C2416
The adc blocks of the S3C2443 and S3C2416 define some additional registers and bits. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -20,6 +20,7 @@
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#define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C)
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#define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10)
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#define S3C64XX_ADCUPDN S3C2410_ADCREG(0x14)
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#define S3C2443_ADCMUX S3C2410_ADCREG(0x18)
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#define S3C64XX_ADCCLRINT S3C2410_ADCREG(0x18)
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#define S5P_ADCMUX S3C2410_ADCREG(0x1C)
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#define S3C64XX_ADCCLRINTPNDNUP S3C2410_ADCREG(0x20)
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@ -33,6 +34,7 @@
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#define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6)
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#define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3)
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#define S3C2410_ADCCON_MUXMASK (0x7<<3)
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#define S3C2416_ADCCON_RESSEL (1 << 3)
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#define S3C2410_ADCCON_STDBM (1<<2)
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#define S3C2410_ADCCON_READ_START (1<<1)
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#define S3C2410_ADCCON_ENABLE_START (1<<0)
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@ -40,6 +42,7 @@
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/* ADCTSC Register Bits */
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#define S3C2443_ADCTSC_UD_SEN (1 << 8)
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#define S3C2410_ADCTSC_YM_SEN (1<<7)
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#define S3C2410_ADCTSC_YP_SEN (1<<6)
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#define S3C2410_ADCTSC_XM_SEN (1<<5)
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