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arm: dts: mt2701: Add usb2 device nodes
Add musb nodes and usb2 phy nodes for MT2701 Signed-off-by: Min Guo <min.guo@mediatek.com> Link: https://lore.kernel.org/r/20191211015446.11477-3-min.guo@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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@ -6,6 +6,7 @@
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include "mt2701.dtsi"
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/ {
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@ -61,6 +62,15 @@ backlight_lcd: backlight_lcd {
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>;
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default-brightness-level = <9>;
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};
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usb_vbus: regulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "usb_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&pio 45 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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&auxadc {
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@ -230,3 +240,14 @@ pins1 {
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&uart0 {
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status = "okay";
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};
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&usb2 {
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status = "okay";
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usb-role-switch;
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connector{
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compatible = "gpio-usb-b-connector", "usb-b-connector";
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type = "micro";
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id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
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vbus-supply = <&usb_vbus>;
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};
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};
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@ -671,6 +671,39 @@ u3port1: usb-phy@1a244900 {
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};
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};
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usb2: usb@11200000 {
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compatible = "mediatek,mt2701-musb",
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"mediatek,mtk-musb";
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reg = <0 0x11200000 0 0x1000>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
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interrupt-names = "mc";
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phys = <&u2port2 PHY_TYPE_USB2>;
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dr_mode = "otg";
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clocks = <&pericfg CLK_PERI_USB0>,
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<&pericfg CLK_PERI_USB0_MCU>,
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<&pericfg CLK_PERI_USB_SLV>;
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clock-names = "main","mcu","univpll";
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power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
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status = "disabled";
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};
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u2phy0: usb-phy@11210000 {
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compatible = "mediatek,generic-tphy-v1";
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reg = <0 0x11210000 0 0x0800>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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status = "okay";
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u2port2: usb-phy@1a1c4800 {
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reg = <0 0x11210800 0 0x0100>;
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clocks = <&topckgen CLK_TOP_USB_PHY48M>;
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clock-names = "ref";
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#phy-cells = <1>;
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status = "okay";
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};
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};
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ethsys: syscon@1b000000 {
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compatible = "mediatek,mt2701-ethsys", "syscon";
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reg = <0 0x1b000000 0 0x1000>;
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