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ASoC: qcom: Specify LE device endianness
This is a little endian device, but so far we've been relying on the regmap mmio bus handling this for us without explicitly stating that fact. After commit 4a98da2164cf (regmap-mmio: Use native endianness for read/write, 2015-10-29), the regmap mmio bus will read/write with the __raw_*() IO accessors, instead of using the readl/writel() APIs that do proper byte swapping for little endian devices. So if we're running on a big endian processor and haven't specified the endianness explicitly in the regmap config or in DT, we're going to switch from doing little endian byte swapping to big endian accesses without byte swapping, leading to some confusing results. Specify the endianness explicitly so that the regmap core properly byte swaps the accesses for us. Cc: Kenneth Westfield <kwestfie@codeaurora.org> Cc: Kevin Hilman <khilman@linaro.org> Cc: Tyler Baker <tyler.baker@linaro.org> Cc: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -355,6 +355,7 @@ static struct regmap_config lpass_cpu_regmap_config = {
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.readable_reg = lpass_cpu_regmap_readable,
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.volatile_reg = lpass_cpu_regmap_volatile,
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.cache_type = REGCACHE_FLAT,
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.val_format_endian = REGMAP_ENDIAN_LITTLE,
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};
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int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev)
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