mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-03-09 15:43:47 +07:00
Merge series "spi: spi-mtk-nor: make use of full capability of program mode" from Chuanhong Guo <gch981213@gmail.com>:
"program" mode on this controller can trigger up to 56 bits of data
shifting. During the operation, data in PRGDATA[0-5] will be
shifted out from MOSI, and data from MISO will be continuously filling
SHREG[0-9].
Currently this mode is used to implement transfer_one_message for 6-byte
full-duplex transfer, but it can execute a transfer for up-to 7 bytes
as long as the last byte is read only.
transfer_one_message is expected to perform full-duplex transfer,
instead of transfer with specific format. mtk_nor_spi_mem_prg is
added here to use this extra byte.
Newer version of this controller can trigger longer data shifting with
shift bytes more than PRGDATA_MAX + SHREG_MAX. This patch is implemented
with that in mind and it checks against both SHREG_MAX and PRG_CNT_MAX
for future support of new controllers.
Patch 3/3 is a fix for:
commit a59b2c7c56
("spi: spi-mtk-nor: support standard spi properties")
which breaks supports_op logic. But it can't be separated as it depends
on patch 2/3. Fortuantely the broken commit isn't in stable yet.
Chuanhong Guo (3):
spi: spi-mtk-nor: make use of full capability of prg mode
spi: spi-mtk-nor: add helper for checking prg mode ops
spi: spi-mtk-nor: fix op checks in supports_op
drivers/spi/spi-mtk-nor.c | 179 +++++++++++++++++++++++++++++++++-----
1 file changed, 158 insertions(+), 21 deletions(-)
--
2.26.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
This commit is contained in:
commit
184ec013fc
@ -27,6 +27,7 @@
|
||||
#define MTK_NOR_CMD_MASK GENMASK(5, 0)
|
||||
|
||||
#define MTK_NOR_REG_PRG_CNT 0x04
|
||||
#define MTK_NOR_PRG_CNT_MAX 56
|
||||
#define MTK_NOR_REG_RDATA 0x0c
|
||||
|
||||
#define MTK_NOR_REG_RADR0 0x10
|
||||
@ -167,10 +168,76 @@ static bool mtk_nor_match_read(const struct spi_mem_op *op)
|
||||
return false;
|
||||
}
|
||||
|
||||
static bool mtk_nor_match_prg(const struct spi_mem_op *op)
|
||||
{
|
||||
int tx_len, rx_len, prg_len, prg_left;
|
||||
|
||||
// prg mode is spi-only.
|
||||
if ((op->cmd.buswidth > 1) || (op->addr.buswidth > 1) ||
|
||||
(op->dummy.buswidth > 1) || (op->data.buswidth > 1))
|
||||
return false;
|
||||
|
||||
tx_len = op->cmd.nbytes + op->addr.nbytes;
|
||||
|
||||
if (op->data.dir == SPI_MEM_DATA_OUT) {
|
||||
// count dummy bytes only if we need to write data after it
|
||||
tx_len += op->dummy.nbytes;
|
||||
|
||||
// leave at least one byte for data
|
||||
if (tx_len > MTK_NOR_REG_PRGDATA_MAX)
|
||||
return false;
|
||||
|
||||
// if there's no addr, meaning adjust_op_size is impossible,
|
||||
// check data length as well.
|
||||
if ((!op->addr.nbytes) &&
|
||||
(tx_len + op->data.nbytes > MTK_NOR_REG_PRGDATA_MAX + 1))
|
||||
return false;
|
||||
} else if (op->data.dir == SPI_MEM_DATA_IN) {
|
||||
if (tx_len > MTK_NOR_REG_PRGDATA_MAX + 1)
|
||||
return false;
|
||||
|
||||
rx_len = op->data.nbytes;
|
||||
prg_left = MTK_NOR_PRG_CNT_MAX / 8 - tx_len - op->dummy.nbytes;
|
||||
if (prg_left > MTK_NOR_REG_SHIFT_MAX + 1)
|
||||
prg_left = MTK_NOR_REG_SHIFT_MAX + 1;
|
||||
if (rx_len > prg_left) {
|
||||
if (!op->addr.nbytes)
|
||||
return false;
|
||||
rx_len = prg_left;
|
||||
}
|
||||
|
||||
prg_len = tx_len + op->dummy.nbytes + rx_len;
|
||||
if (prg_len > MTK_NOR_PRG_CNT_MAX / 8)
|
||||
return false;
|
||||
} else {
|
||||
prg_len = tx_len + op->dummy.nbytes;
|
||||
if (prg_len > MTK_NOR_PRG_CNT_MAX / 8)
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
static void mtk_nor_adj_prg_size(struct spi_mem_op *op)
|
||||
{
|
||||
int tx_len, tx_left, prg_left;
|
||||
|
||||
tx_len = op->cmd.nbytes + op->addr.nbytes;
|
||||
if (op->data.dir == SPI_MEM_DATA_OUT) {
|
||||
tx_len += op->dummy.nbytes;
|
||||
tx_left = MTK_NOR_REG_PRGDATA_MAX + 1 - tx_len;
|
||||
if (op->data.nbytes > tx_left)
|
||||
op->data.nbytes = tx_left;
|
||||
} else if (op->data.dir == SPI_MEM_DATA_IN) {
|
||||
prg_left = MTK_NOR_PRG_CNT_MAX / 8 - tx_len - op->dummy.nbytes;
|
||||
if (prg_left > MTK_NOR_REG_SHIFT_MAX + 1)
|
||||
prg_left = MTK_NOR_REG_SHIFT_MAX + 1;
|
||||
if (op->data.nbytes > prg_left)
|
||||
op->data.nbytes = prg_left;
|
||||
}
|
||||
}
|
||||
|
||||
static int mtk_nor_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op)
|
||||
{
|
||||
size_t len;
|
||||
|
||||
if (!op->data.nbytes)
|
||||
return 0;
|
||||
|
||||
@ -199,18 +266,15 @@ static int mtk_nor_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op)
|
||||
}
|
||||
}
|
||||
|
||||
len = MTK_NOR_PRG_MAX_SIZE - op->cmd.nbytes - op->addr.nbytes -
|
||||
op->dummy.nbytes;
|
||||
if (op->data.nbytes > len)
|
||||
op->data.nbytes = len;
|
||||
|
||||
mtk_nor_adj_prg_size(op);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static bool mtk_nor_supports_op(struct spi_mem *mem,
|
||||
const struct spi_mem_op *op)
|
||||
{
|
||||
size_t len;
|
||||
if (!spi_mem_default_supports_op(mem, op))
|
||||
return false;
|
||||
|
||||
if (op->cmd.buswidth != 1)
|
||||
return false;
|
||||
@ -218,25 +282,21 @@ static bool mtk_nor_supports_op(struct spi_mem *mem,
|
||||
if ((op->addr.nbytes == 3) || (op->addr.nbytes == 4)) {
|
||||
switch(op->data.dir) {
|
||||
case SPI_MEM_DATA_IN:
|
||||
if (!mtk_nor_match_read(op))
|
||||
return false;
|
||||
if (mtk_nor_match_read(op))
|
||||
return true;
|
||||
break;
|
||||
case SPI_MEM_DATA_OUT:
|
||||
if ((op->addr.buswidth != 1) ||
|
||||
(op->dummy.nbytes != 0) ||
|
||||
(op->data.buswidth != 1))
|
||||
return false;
|
||||
if ((op->addr.buswidth == 1) &&
|
||||
(op->dummy.nbytes == 0) &&
|
||||
(op->data.buswidth == 1))
|
||||
return true;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes;
|
||||
if ((len > MTK_NOR_PRG_MAX_SIZE) ||
|
||||
((op->data.nbytes) && (len == MTK_NOR_PRG_MAX_SIZE)))
|
||||
return false;
|
||||
|
||||
return spi_mem_default_supports_op(mem, op);
|
||||
return mtk_nor_match_prg(op);
|
||||
}
|
||||
|
||||
static void mtk_nor_setup_bus(struct mtk_nor *sp, const struct spi_mem_op *op)
|
||||
@ -404,6 +464,83 @@ static int mtk_nor_pp_unbuffered(struct mtk_nor *sp,
|
||||
return mtk_nor_cmd_exec(sp, MTK_NOR_CMD_WRITE, 6 * BITS_PER_BYTE);
|
||||
}
|
||||
|
||||
static int mtk_nor_spi_mem_prg(struct mtk_nor *sp, const struct spi_mem_op *op)
|
||||
{
|
||||
int rx_len = 0;
|
||||
int reg_offset = MTK_NOR_REG_PRGDATA_MAX;
|
||||
int tx_len, prg_len;
|
||||
int i, ret;
|
||||
void __iomem *reg;
|
||||
u8 bufbyte;
|
||||
|
||||
tx_len = op->cmd.nbytes + op->addr.nbytes;
|
||||
|
||||
// count dummy bytes only if we need to write data after it
|
||||
if (op->data.dir == SPI_MEM_DATA_OUT)
|
||||
tx_len += op->dummy.nbytes + op->data.nbytes;
|
||||
else if (op->data.dir == SPI_MEM_DATA_IN)
|
||||
rx_len = op->data.nbytes;
|
||||
|
||||
prg_len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes +
|
||||
op->data.nbytes;
|
||||
|
||||
// an invalid op may reach here if the caller calls exec_op without
|
||||
// adjust_op_size. return -EINVAL instead of -ENOTSUPP so that
|
||||
// spi-mem won't try this op again with generic spi transfers.
|
||||
if ((tx_len > MTK_NOR_REG_PRGDATA_MAX + 1) ||
|
||||
(rx_len > MTK_NOR_REG_SHIFT_MAX + 1) ||
|
||||
(prg_len > MTK_NOR_PRG_CNT_MAX / 8))
|
||||
return -EINVAL;
|
||||
|
||||
// fill tx data
|
||||
for (i = op->cmd.nbytes; i > 0; i--, reg_offset--) {
|
||||
reg = sp->base + MTK_NOR_REG_PRGDATA(reg_offset);
|
||||
bufbyte = (op->cmd.opcode >> ((i - 1) * BITS_PER_BYTE)) & 0xff;
|
||||
writeb(bufbyte, reg);
|
||||
}
|
||||
|
||||
for (i = op->addr.nbytes; i > 0; i--, reg_offset--) {
|
||||
reg = sp->base + MTK_NOR_REG_PRGDATA(reg_offset);
|
||||
bufbyte = (op->addr.val >> ((i - 1) * BITS_PER_BYTE)) & 0xff;
|
||||
writeb(bufbyte, reg);
|
||||
}
|
||||
|
||||
if (op->data.dir == SPI_MEM_DATA_OUT) {
|
||||
for (i = 0; i < op->dummy.nbytes; i++, reg_offset--) {
|
||||
reg = sp->base + MTK_NOR_REG_PRGDATA(reg_offset);
|
||||
writeb(0, reg);
|
||||
}
|
||||
|
||||
for (i = 0; i < op->data.nbytes; i++, reg_offset--) {
|
||||
reg = sp->base + MTK_NOR_REG_PRGDATA(reg_offset);
|
||||
writeb(((const u8 *)(op->data.buf.out))[i], reg);
|
||||
}
|
||||
}
|
||||
|
||||
for (; reg_offset >= 0; reg_offset--) {
|
||||
reg = sp->base + MTK_NOR_REG_PRGDATA(reg_offset);
|
||||
writeb(0, reg);
|
||||
}
|
||||
|
||||
// trigger op
|
||||
writel(prg_len * BITS_PER_BYTE, sp->base + MTK_NOR_REG_PRG_CNT);
|
||||
ret = mtk_nor_cmd_exec(sp, MTK_NOR_CMD_PROGRAM,
|
||||
prg_len * BITS_PER_BYTE);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
// fetch read data
|
||||
reg_offset = 0;
|
||||
if (op->data.dir == SPI_MEM_DATA_IN) {
|
||||
for (i = op->data.nbytes - 1; i >= 0; i--, reg_offset++) {
|
||||
reg = sp->base + MTK_NOR_REG_SHIFT(reg_offset);
|
||||
((u8 *)(op->data.buf.in))[i] = readb(reg);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mtk_nor_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
|
||||
{
|
||||
struct mtk_nor *sp = spi_controller_get_devdata(mem->spi->master);
|
||||
@ -411,7 +548,7 @@ static int mtk_nor_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
|
||||
|
||||
if ((op->data.nbytes == 0) ||
|
||||
((op->addr.nbytes != 3) && (op->addr.nbytes != 4)))
|
||||
return -ENOTSUPP;
|
||||
return mtk_nor_spi_mem_prg(sp, op);
|
||||
|
||||
if (op->data.dir == SPI_MEM_DATA_OUT) {
|
||||
mtk_nor_set_addr(sp, op);
|
||||
@ -441,7 +578,7 @@ static int mtk_nor_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
|
||||
}
|
||||
}
|
||||
|
||||
return -ENOTSUPP;
|
||||
return mtk_nor_spi_mem_prg(sp, op);
|
||||
}
|
||||
|
||||
static int mtk_nor_setup(struct spi_device *spi)
|
||||
|
Loading…
Reference in New Issue
Block a user