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ARM: dts: sun6i: Add default address and size cells for SPI

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The SPI controller bindings require an address cell size of 1, and a size
cell size of 0. Let's put it at the DTSI level to make sure that's properly
enforced.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This commit is contained in:
Maxime Ripard 2019-05-20 16:50:36 +02:00
parent ca0961011d
commit 17996e5b0b
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GPG Key ID: E3EF0D6F671851C5
1 changed files with 8 additions and 0 deletions
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8
arch/arm/boot/dts/sun6i-a31.dtsi
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@ -987,6 +987,8 @@ spi0: spi@1c68000 {
dma-names = "rx", "tx";
resets = <&ccu RST_AHB1_SPI0>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi1: spi@1c69000 {
@ -999,6 +1001,8 @@ spi1: spi@1c69000 {
dma-names = "rx", "tx";
resets = <&ccu RST_AHB1_SPI1>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi2: spi@1c6a000 {
@ -1011,6 +1015,8 @@ spi2: spi@1c6a000 {
dma-names = "rx", "tx";
resets = <&ccu RST_AHB1_SPI2>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi3: spi@1c6b000 {
@ -1023,6 +1029,8 @@ spi3: spi@1c6b000 {
dma-names = "rx", "tx";
resets = <&ccu RST_AHB1_SPI3>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
gic: interrupt-controller@1c81000 {