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mfd: cs47l90: Make DAC_AEC_CONTROL_2 readable
There is a second AEC loopback on cs47l90 so the registers for it should be readable. Signed-off-by: Ajit Pandey <ajit.pandey@cirrus.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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@ -263,6 +263,7 @@ static const struct reg_default cs47l90_reg_default[] = {
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{ 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */
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{ 0x00000448, 0x003f }, /* R1096 (0x448) - eDRE Enable */
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{ 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */
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{ 0x00000451, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 2 */
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{ 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */
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{ 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */
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{ 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */
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@ -1692,6 +1693,7 @@ static bool cs47l90_16bit_readable_register(struct device *dev,
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case MADERA_DRE_ENABLE:
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case MADERA_EDRE_ENABLE:
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case MADERA_DAC_AEC_CONTROL_1:
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case MADERA_DAC_AEC_CONTROL_2:
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case MADERA_NOISE_GATE_CONTROL:
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case MADERA_PDM_SPK1_CTRL_1:
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case MADERA_PDM_SPK1_CTRL_2:
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