mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 01:48:11 +07:00
Merge branch 'mlx5-next'
Eli Cohen says: ==================== mlx5 driver updates The following series contains some fixes to mlx5 as well as update to the list of supported devices. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
177211b993
@ -159,6 +159,9 @@ static int add_keys(struct mlx5_ib_dev *dev, int c, int num)
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sizeof(*in), reg_mr_callback,
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mr, &mr->out);
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if (err) {
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spin_lock_irq(&ent->lock);
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ent->pending--;
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spin_unlock_irq(&ent->lock);
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mlx5_ib_warn(dev, "create mkey failed %d\n", err);
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kfree(mr);
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break;
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@ -1011,9 +1011,14 @@ static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv
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}
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} else {
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spin_lock_irq(&send_cq->lock);
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__acquire(&recv_cq->lock);
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}
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} else if (recv_cq) {
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spin_lock_irq(&recv_cq->lock);
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__acquire(&send_cq->lock);
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} else {
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__acquire(&send_cq->lock);
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__acquire(&recv_cq->lock);
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}
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}
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@ -1033,10 +1038,15 @@ static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *re
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spin_unlock_irq(&recv_cq->lock);
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}
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} else {
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__release(&recv_cq->lock);
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spin_unlock_irq(&send_cq->lock);
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}
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} else if (recv_cq) {
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__release(&send_cq->lock);
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spin_unlock_irq(&recv_cq->lock);
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} else {
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__release(&recv_cq->lock);
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__release(&send_cq->lock);
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}
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}
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@ -2411,7 +2421,7 @@ static u8 get_fence(u8 fence, struct ib_send_wr *wr)
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static int begin_wqe(struct mlx5_ib_qp *qp, void **seg,
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struct mlx5_wqe_ctrl_seg **ctrl,
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struct ib_send_wr *wr, int *idx,
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struct ib_send_wr *wr, unsigned *idx,
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int *size, int nreq)
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{
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int err = 0;
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@ -2737,6 +2747,8 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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if (bf->need_lock)
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spin_lock(&bf->lock);
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else
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__acquire(&bf->lock);
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/* TBD enable WC */
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if (0 && nreq == 1 && bf->uuarn && inl && size > 1 && size <= bf->buf_size / 16) {
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@ -2753,6 +2765,8 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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bf->offset ^= bf->buf_size;
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if (bf->need_lock)
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spin_unlock(&bf->lock);
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else
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__release(&bf->lock);
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}
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spin_unlock_irqrestore(&qp->sq.lock, flags);
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@ -1363,7 +1363,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
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goto err_map;
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}
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if (cmd->log_sz + cmd->log_stride > PAGE_SHIFT) {
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if (cmd->log_sz + cmd->log_stride > MLX5_ADAPTER_PAGE_SHIFT) {
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dev_err(&dev->pdev->dev, "command queue size overflow\n");
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err = -EINVAL;
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goto err_map;
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@ -225,8 +225,8 @@ static int mlx5_eq_int(struct mlx5_core_dev *dev, struct mlx5_eq *eq)
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case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
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case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
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rsn = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff;
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mlx5_core_dbg(dev, "event %s(%d) arrived\n",
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eqe_type_str(eqe->type), eqe->type);
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mlx5_core_dbg(dev, "event %s(%d) arrived on resource 0x%x\n",
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eqe_type_str(eqe->type), eqe->type, rsn);
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mlx5_rsc_event(dev, rsn, eqe->type);
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break;
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@ -43,6 +43,7 @@
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#include <linux/mlx5/qp.h>
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#include <linux/mlx5/srq.h>
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#include <linux/debugfs.h>
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#include <linux/kmod.h>
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#include <linux/mlx5/mlx5_ifc.h>
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#include "mlx5_core.h"
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@ -225,7 +226,7 @@ static int mlx5_enable_msix(struct mlx5_core_dev *dev)
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table->msix_arr[i].entry = i;
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nvec = pci_enable_msix_range(dev->pdev, table->msix_arr,
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MLX5_EQ_VEC_COMP_BASE, nvec);
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MLX5_EQ_VEC_COMP_BASE + 1, nvec);
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if (nvec < 0)
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return nvec;
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@ -840,6 +841,8 @@ struct mlx5_core_event_handler {
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void *data);
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};
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#define MLX5_IB_MOD "mlx5_ib"
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static int init_one(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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@ -878,6 +881,10 @@ static int init_one(struct pci_dev *pdev,
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goto out_init;
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}
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err = request_module_nowait(MLX5_IB_MOD);
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if (err)
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pr_info("failed request module on %s\n", MLX5_IB_MOD);
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return 0;
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out_init:
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@ -896,8 +903,12 @@ static void remove_one(struct pci_dev *pdev)
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}
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static const struct pci_device_id mlx5_core_pci_table[] = {
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{ PCI_VDEVICE(MELLANOX, 4113) }, /* MT4113 Connect-IB */
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{ PCI_VDEVICE(MELLANOX, 4113) }, /* Connect-IB */
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{ PCI_VDEVICE(MELLANOX, 4114) }, /* Connect-IB VF */
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{ PCI_VDEVICE(MELLANOX, 4115) }, /* ConnectX-4 */
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{ PCI_VDEVICE(MELLANOX, 4116) }, /* ConnectX-4 VF */
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{ PCI_VDEVICE(MELLANOX, 4117) }, /* ConnectX-4LX */
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{ PCI_VDEVICE(MELLANOX, 4118) }, /* ConnectX-4LX VF */
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{ 0, }
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};
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@ -96,6 +96,7 @@ int mlx5_cmd_free_uar(struct mlx5_core_dev *dev, u32 uarn)
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int err;
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memset(&in, 0, sizeof(in));
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memset(&out, 0, sizeof(out));
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in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_DEALLOC_UAR);
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in.uarn = cpu_to_be32(uarn);
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err = mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out));
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@ -219,23 +219,15 @@ enum {
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};
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enum {
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MLX5_DEV_CAP_FLAG_RC = 1LL << 0,
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MLX5_DEV_CAP_FLAG_UC = 1LL << 1,
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MLX5_DEV_CAP_FLAG_UD = 1LL << 2,
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MLX5_DEV_CAP_FLAG_XRC = 1LL << 3,
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MLX5_DEV_CAP_FLAG_SRQ = 1LL << 6,
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MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1LL << 8,
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MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1LL << 9,
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MLX5_DEV_CAP_FLAG_APM = 1LL << 17,
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MLX5_DEV_CAP_FLAG_ATOMIC = 1LL << 18,
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MLX5_DEV_CAP_FLAG_BLOCK_MCAST = 1LL << 23,
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MLX5_DEV_CAP_FLAG_ON_DMND_PG = 1LL << 24,
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MLX5_DEV_CAP_FLAG_CQ_MODER = 1LL << 29,
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MLX5_DEV_CAP_FLAG_RESIZE_CQ = 1LL << 30,
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MLX5_DEV_CAP_FLAG_RESIZE_SRQ = 1LL << 32,
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MLX5_DEV_CAP_FLAG_DCT = 1LL << 37,
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MLX5_DEV_CAP_FLAG_REMOTE_FENCE = 1LL << 38,
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MLX5_DEV_CAP_FLAG_TLP_HINTS = 1LL << 39,
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MLX5_DEV_CAP_FLAG_SIG_HAND_OVER = 1LL << 40,
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MLX5_DEV_CAP_FLAG_CMDIF_CSUM = 3LL << 46,
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};
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