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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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arm64: dts: Add USB3 related nodes for MT2712
This patch adds USB3 related nodes for mt2712m1 platform. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Chunfeng Yun
Matthias Brugger
parent
398ed29225
commit
1724f4cc51
@ -6,6 +6,7 @@
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include "mt2712e.dtsi"
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/ {
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@ -39,6 +40,53 @@ cpus_fixed_vproc1: fixedregulator@1 {
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regulator-max-microvolt = <1000000>;
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};
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extcon_usb: extcon_iddig {
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compatible = "linux,extcon-usb-gpio";
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id-gpio = <&pio 12 GPIO_ACTIVE_HIGH>;
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};
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extcon_usb1: extcon_iddig1 {
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compatible = "linux,extcon-usb-gpio";
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id-gpio = <&pio 14 GPIO_ACTIVE_HIGH>;
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};
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usb_p0_vbus: regulator@2 {
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compatible = "regulator-fixed";
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regulator-name = "p0_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&pio 13 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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usb_p1_vbus: regulator@3 {
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compatible = "regulator-fixed";
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regulator-name = "p1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&pio 15 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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usb_p2_vbus: regulator@4 {
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compatible = "regulator-fixed";
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regulator-name = "p2_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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usb_p3_vbus: regulator@5 {
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compatible = "regulator-fixed";
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regulator-name = "p3_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&pio 17 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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};
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};
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&auxadc {
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@ -57,7 +105,57 @@ &cpu2 {
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proc-supply = <&cpus_fixed_vproc1>;
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};
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&pio {
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usb0_id_pins_float: usb0_iddig {
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pins_iddig {
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pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>;
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bias-pull-up;
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};
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};
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usb1_id_pins_float: usb1_iddig {
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pins_iddig {
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pinmux = <MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B>;
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bias-pull-up;
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};
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};
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};
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&ssusb {
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vbus-supply = <&usb_p0_vbus>;
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extcon = <&extcon_usb>;
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dr_mode = "otg";
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wakeup-source;
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mediatek,u3p-dis-msk = <0x1>;
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//enable-manual-drd;
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//maximum-speed = "full-speed";
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pinctrl-names = "default";
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pinctrl-0 = <&usb0_id_pins_float>;
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status = "okay";
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};
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&ssusb1 {
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vbus-supply = <&usb_p1_vbus>;
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extcon = <&extcon_usb1>;
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dr_mode = "otg";
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//mediatek,u3p-dis-msk = <0x1>;
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enable-manual-drd;
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wakeup-source;
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//maximum-speed = "full-speed";
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pinctrl-names = "default";
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pinctrl-0 = <&usb1_id_pins_float>;
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&usb_host0 {
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vbus-supply = <&usb_p2_vbus>;
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status = "okay";
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};
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&usb_host1 {
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status = "okay";
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};
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@ -8,6 +8,7 @@
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#include <dt-bindings/clock/mt2712-clk.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/power/mt2712-power.h>
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#include "mt2712-pinfunc.h"
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@ -405,6 +406,131 @@ uart4: serial@11019000 {
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status = "disabled";
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};
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ssusb: usb@11271000 {
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compatible = "mediatek,mt2712-mtu3", "mediatek,mtu3";
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reg = <0 0x11271000 0 0x3000>,
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<0 0x11280700 0 0x0100>;
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reg-names = "mac", "ippc";
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interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_LOW>;
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phys = <&u2port0 PHY_TYPE_USB2>,
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<&u2port1 PHY_TYPE_USB2>;
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power-domains = <&scpsys MT2712_POWER_DOMAIN_USB>;
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clocks = <&topckgen CLK_TOP_USB30_SEL>;
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clock-names = "sys_ck";
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mediatek,syscon-wakeup = <&pericfg 0x510 2>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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status = "disabled";
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usb_host0: xhci@11270000 {
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compatible = "mediatek,mt2712-xhci",
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"mediatek,mtk-xhci";
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reg = <0 0x11270000 0 0x1000>;
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reg-names = "mac";
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interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_LOW>;
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power-domains = <&scpsys MT2712_POWER_DOMAIN_USB>;
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clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
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clock-names = "sys_ck", "ref_ck";
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status = "disabled";
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};
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};
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u3phy0: usb-phy@11290000 {
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compatible = "mediatek,mt2712-u3phy";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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status = "okay";
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u2port0: usb-phy@11290000 {
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reg = <0 0x11290000 0 0x700>;
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clocks = <&clk26m>;
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clock-names = "ref";
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#phy-cells = <1>;
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status = "okay";
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};
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u2port1: usb-phy@11298000 {
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reg = <0 0x11298000 0 0x700>;
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clocks = <&clk26m>;
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clock-names = "ref";
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#phy-cells = <1>;
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status = "okay";
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};
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u3port0: usb-phy@11298700 {
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reg = <0 0x11298700 0 0x900>;
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clocks = <&clk26m>;
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clock-names = "ref";
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#phy-cells = <1>;
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status = "okay";
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};
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};
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ssusb1: usb@112c1000 {
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compatible = "mediatek,mt2712-mtu3", "mediatek,mtu3";
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reg = <0 0x112c1000 0 0x3000>,
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<0 0x112d0700 0 0x0100>;
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reg-names = "mac", "ippc";
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interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_LOW>;
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phys = <&u2port2 PHY_TYPE_USB2>,
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<&u2port3 PHY_TYPE_USB2>,
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<&u3port1 PHY_TYPE_USB3>;
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power-domains = <&scpsys MT2712_POWER_DOMAIN_USB2>;
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clocks = <&topckgen CLK_TOP_USB30_SEL>;
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clock-names = "sys_ck";
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mediatek,syscon-wakeup = <&pericfg 0x514 2>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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status = "disabled";
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usb_host1: xhci@112c0000 {
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compatible = "mediatek,mt2712-xhci",
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"mediatek,mtk-xhci";
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reg = <0 0x112c0000 0 0x1000>;
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reg-names = "mac";
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interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_LOW>;
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power-domains = <&scpsys MT2712_POWER_DOMAIN_USB2>;
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clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
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clock-names = "sys_ck", "ref_ck";
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status = "disabled";
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};
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};
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u3phy1: usb-phy@112e0000 {
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compatible = "mediatek,mt2712-u3phy";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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status = "okay";
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u2port2: usb-phy@112e0000 {
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reg = <0 0x112e0000 0 0x700>;
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clocks = <&clk26m>;
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clock-names = "ref";
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#phy-cells = <1>;
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status = "okay";
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};
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u2port3: usb-phy@112e8000 {
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reg = <0 0x112e8000 0 0x700>;
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clocks = <&clk26m>;
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clock-names = "ref";
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#phy-cells = <1>;
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status = "okay";
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};
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u3port1: usb-phy@112e8700 {
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reg = <0 0x112e8700 0 0x900>;
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clocks = <&clk26m>;
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clock-names = "ref";
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#phy-cells = <1>;
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status = "okay";
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};
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};
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mfgcfg: syscon@13000000 {
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compatible = "mediatek,mt2712-mfgcfg", "syscon";
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reg = <0 0x13000000 0 0x1000>;
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