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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-17 03:36:59 +07:00
x86, irq: Simplify the way to handle ISA IRQ
On startup, setup_IO_APIC_irqs() will program all IOAPIC pins for ISA IRQs. Later when mp_map_pin_to_irq() is called, it just returns ISA IRQ number without programming corresponding IOAPIC pin. This patch consolidates the way to program IOAPIC pins for both ISA and non-ISA IRQs into mp_map_pin_to_irq() as below: 1) For ISA IRQs, mp_irqs array is used to map IOAPIC pin to IRQ and mp_irqdomain_map() is used to actually program the pin. 2) For non-ISA IRQs, irqdomain is used to map IOAPIC pin to IRQ, and mp_irqdomain_map() is also used to actually program the pin. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Len Brown <len.brown@intel.com> Cc: Pavel Machek <pavel@ucw.cz> Link: http://lkml.kernel.org/r/1402302011-23642-36-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -101,17 +101,6 @@ static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = {
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#define ACPI_INVALID_GSI INT_MIN
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static int map_gsi_to_irq(unsigned int gsi, unsigned int flags)
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{
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int i;
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for (i = 0; i < nr_legacy_irqs(); i++)
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if (isa_irq_to_gsi[i] == gsi)
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return i;
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return mp_map_gsi_to_irq(gsi, flags);
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}
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/*
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* This is just a simple wrapper around early_ioremap(),
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* with sanity checks for phys == 0 and size == 0.
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@ -422,7 +411,7 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int trigger,
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return -1;
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}
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irq = map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC);
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irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC);
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if (irq < 0)
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return irq;
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@ -603,7 +592,7 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
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int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp)
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{
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int irq = map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC | IOAPIC_MAP_CHECK);
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int irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC | IOAPIC_MAP_CHECK);
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if (irq >= 0) {
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*irqp = irq;
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@ -204,8 +204,6 @@ static int __init parse_noapic(char *str)
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}
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early_param("noapic", parse_noapic);
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static int io_apic_setup_irq_pin(unsigned int irq, int node,
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struct io_apic_irq_attr *attr);
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static struct irq_cfg *alloc_irq_and_cfg_at(unsigned int at, int node);
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/* Will be called in mpparse/acpi/sfi codes for saving IRQ info */
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@ -1021,6 +1019,16 @@ static int mp_map_pin_to_irq(u32 gsi, int idx, int ioapic, int pin,
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struct irq_domain *domain = mp_ioapic_irqdomain(ioapic);
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struct mp_pin_info *info = mp_pin_info(ioapic, pin);
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if (!domain) {
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/*
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* Provide an identity mapping of gsi == irq except on truly
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* weird platforms that have non isa irqs in the first 16 gsis.
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*/
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return gsi >= nr_legacy_irqs() ? gsi : gsi_top + gsi;
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}
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mutex_lock(&ioapic_mutex);
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/*
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* Don't use irqdomain to manage ISA IRQs because there may be
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* multiple IOAPIC pins sharing the same ISA IRQ number and
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@ -1033,28 +1041,30 @@ static int mp_map_pin_to_irq(u32 gsi, int idx, int ioapic, int pin,
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* the interrupt routing logic. Thus there may be multiple pins
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* sharing the same legacy IRQ number when ACPI is disabled.
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*/
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if (idx >= 0 && test_bit(mp_irqs[idx].srcbus, mp_bus_not_pci))
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return mp_irqs[idx].srcbusirq;
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if (idx >= 0 && test_bit(mp_irqs[idx].srcbus, mp_bus_not_pci)) {
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irq = mp_irqs[idx].srcbusirq;
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if (flags & IOAPIC_MAP_ALLOC) {
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if (info->count == 0 &&
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mp_irqdomain_map(domain, irq, pin) != 0)
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irq = -1;
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if (!domain) {
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/*
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* Provide an identity mapping of gsi == irq except on truly
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* weird platforms that have non isa irqs in the first 16 gsis.
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*/
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return gsi >= nr_legacy_irqs() ? gsi : gsi_top + gsi;
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/* special handling for timer IRQ0 */
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if (irq == 0)
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info->count++;
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}
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} else {
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irq = irq_find_mapping(domain, pin);
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if (irq <= 0 && (flags & IOAPIC_MAP_ALLOC))
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irq = alloc_irq_from_domain(domain, gsi, pin);
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}
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mutex_lock(&ioapic_mutex);
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irq = irq_find_mapping(domain, pin);
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if (irq <= 0 && (flags & IOAPIC_MAP_ALLOC))
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irq = alloc_irq_from_domain(domain, gsi, pin);
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if (flags & IOAPIC_MAP_ALLOC) {
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if (irq > 0)
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info->count++;
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else if (info->count == 0)
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info->set = 0;
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}
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mutex_unlock(&ioapic_mutex);
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return irq > 0 ? irq : -1;
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@ -1471,55 +1481,23 @@ static void setup_ioapic_irq(unsigned int irq, struct irq_cfg *cfg,
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ioapic_write_entry(attr->ioapic, attr->ioapic_pin, entry);
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}
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static bool __init io_apic_pin_not_connected(int idx, int ioapic_idx, int pin)
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{
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if (idx != -1)
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return false;
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apic_printk(APIC_VERBOSE, KERN_DEBUG " apic %d pin %d not connected\n",
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mpc_ioapic_id(ioapic_idx), pin);
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return true;
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}
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static void __init __io_apic_setup_irqs(unsigned int ioapic_idx)
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{
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int idx, node = cpu_to_node(0);
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struct io_apic_irq_attr attr;
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unsigned int pin, irq;
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for_each_pin(ioapic_idx, pin) {
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idx = find_irq_entry(ioapic_idx, pin, mp_INT);
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if (io_apic_pin_not_connected(idx, ioapic_idx, pin))
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continue;
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irq = pin_2_irq(idx, ioapic_idx, pin,
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ioapic_idx ? 0 : IOAPIC_MAP_ALLOC);
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if (irq < 0 || !mp_init_irq_at_boot(ioapic_idx, irq))
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continue;
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/*
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* Skip the timer IRQ if there's a quirk handler
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* installed and if it returns 1:
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*/
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if (apic->multi_timer_check &&
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apic->multi_timer_check(ioapic_idx, irq))
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continue;
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set_io_apic_irq_attr(&attr, ioapic_idx, pin, irq_trigger(idx),
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irq_polarity(idx));
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io_apic_setup_irq_pin(irq, node, &attr);
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}
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}
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static void __init setup_IO_APIC_irqs(void)
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{
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unsigned int ioapic_idx;
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unsigned int ioapic, pin;
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int idx;
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apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");
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for_each_ioapic(ioapic_idx)
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__io_apic_setup_irqs(ioapic_idx);
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for_each_ioapic_pin(ioapic, pin) {
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idx = find_irq_entry(ioapic, pin, mp_INT);
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if (idx < 0)
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apic_printk(APIC_VERBOSE,
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KERN_DEBUG " apic %d pin %d not connected\n",
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mpc_ioapic_id(ioapic), pin);
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else
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pin_2_irq(idx, ioapic, pin,
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ioapic ? 0 : IOAPIC_MAP_ALLOC);
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}
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}
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/*
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