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arm64: dts: allwinner: a64: Add MIPI DSI pipeline

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Add MIPI DSI pipeline for Allwinner A64.

- dsi node, with A64 compatible since it doesn't support
  DSI_SCLK gating unlike A33
- dphy node, with A64 compatible with A33 fallback since
  DPHY on A64 and A33 is similar
- finally, attach the dsi_in to tcon0 for complete MIPI DSI

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
This commit is contained in:
Jagan Teki 2019-12-22 18:52:28 +05:30 committed by Maxime Ripard
parent 59f5e9b9a8
commit 16c8ff571a
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GPG Key ID: E3EF0D6F671851C5
1 changed files with 37 additions and 0 deletions
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37
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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@ -367,6 +367,12 @@ tcon0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tcon0_out_dsi: endpoint@1 {
reg = <1>;
remote-endpoint = <&dsi_in_tcon0>;
allwinner,tcon-channel = <1>;
};
};
};
};
@ -1017,6 +1023,37 @@ csi: csi@1cb0000 {
status = "disabled";
};
dsi: dsi@1ca0000 {
compatible = "allwinner,sun50i-a64-mipi-dsi";
reg = <0x01ca0000 0x1000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_MIPI_DSI>;
resets = <&ccu RST_BUS_MIPI_DSI>;
phys = <&dphy>;
phy-names = "dphy";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
port {
dsi_in_tcon0: endpoint {
remote-endpoint = <&tcon0_out_dsi>;
};
};
};
dphy: d-phy@1ca1000 {
compatible = "allwinner,sun50i-a64-mipi-dphy",
"allwinner,sun6i-a31-mipi-dphy";
reg = <0x01ca1000 0x1000>;
clocks = <&ccu CLK_BUS_MIPI_DSI>,
<&ccu CLK_DSI_DPHY>;
clock-names = "bus", "mod";
resets = <&ccu RST_BUS_MIPI_DSI>;
status = "disabled";
#phy-cells = <0>;
};
hdmi: hdmi@1ee0000 {
compatible = "allwinner,sun50i-a64-dw-hdmi",
"allwinner,sun8i-a83t-dw-hdmi";