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drm/amd/display: Connect DC resource to FBC compressor
- Connected DC resource to FBC compressor, - Initial Implementation of FBC for Stoney/Carrizo - Code is currently guarded with "ENABLE_FBC" compile time flag Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -843,6 +843,11 @@ bool dc_enable_stereo(
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int i, j;
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struct pipe_ctx *pipe;
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struct core_dc *core_dc = DC_TO_CORE(dc);
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#ifdef ENABLE_FBC
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struct compressor *fbc_compressor = core_dc->fbc_compressor;
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#endif
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for (i = 0; i < MAX_PIPES; i++) {
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if (context != NULL)
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pipe = &context->res_ctx.pipe_ctx[i];
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@ -854,6 +859,14 @@ bool dc_enable_stereo(
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core_dc->hwss.setup_stereo(pipe, core_dc);
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}
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}
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#ifdef ENABLE_FBC
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if (fbc_compressor != NULL &&
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fbc_compressor->funcs->is_fbc_enabled_in_hw(core_dc->fbc_compressor,
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&pipe->tg->inst))
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fbc_compressor->funcs->disable_fbc(fbc_compressor);
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#endif
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return ret;
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}
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@ -1232,6 +1245,12 @@ void dc_update_surfaces_and_stream(struct dc *dc,
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if (!stream_status)
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return; /* Cannot commit surface to stream that is not committed */
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#ifdef ENABLE_FBC
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if (srf_updates->flip_addr) {
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if (srf_updates->flip_addr->address.grph.addr.low_part == 0)
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ASSERT(0);
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}
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#endif
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context = core_dc->current_context;
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/* update current stream with the new updates */
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@ -175,7 +175,6 @@ void dce110_compressor_power_up_fbc(struct compressor *compressor)
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void dce110_compressor_enable_fbc(
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struct compressor *compressor,
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uint32_t paths_num,
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struct compr_addr_and_pitch_params *params)
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{
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struct dce110_compressor *cp110 = TO_DCE110_COMPRESSOR(compressor);
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@ -366,43 +365,6 @@ void dce110_compressor_set_fbc_invalidation_triggers(
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dm_write_reg(compressor->ctx, addr, value);
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}
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bool dce110_compressor_construct(struct dce110_compressor *compressor,
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struct dc_context *ctx)
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{
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compressor->base.options.bits.FBC_SUPPORT = true;
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/* for dce 11 always use one dram channel for lpt */
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compressor->base.lpt_channels_num = 1;
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compressor->base.options.bits.DUMMY_BACKEND = false;
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/*
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* check if this system has more than 1 dram channel; if only 1 then lpt
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* should not be supported
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*/
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compressor->base.options.bits.CLK_GATING_DISABLED = false;
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compressor->base.ctx = ctx;
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compressor->base.embedded_panel_h_size = 0;
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compressor->base.embedded_panel_v_size = 0;
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compressor->base.memory_bus_width = ctx->asic_id.vram_width;
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compressor->base.allocated_size = 0;
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compressor->base.preferred_requested_size = 0;
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compressor->base.min_compress_ratio = FBC_COMPRESS_RATIO_INVALID;
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compressor->base.options.raw = 0;
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compressor->base.banks_num = 0;
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compressor->base.raw_size = 0;
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compressor->base.channel_interleave_size = 0;
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compressor->base.dram_channels_num = 0;
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compressor->base.lpt_channels_num = 0;
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compressor->base.attached_inst = 0;
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compressor->base.is_enabled = false;
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return true;
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}
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struct compressor *dce110_compressor_create(struct dc_context *ctx)
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{
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struct dce110_compressor *cp110 =
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@ -503,3 +465,43 @@ static const struct compressor_funcs dce110_compressor_funcs = {
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};
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bool dce110_compressor_construct(struct dce110_compressor *compressor,
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struct dc_context *ctx)
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{
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compressor->base.options.bits.FBC_SUPPORT = true;
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/* for dce 11 always use one dram channel for lpt */
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compressor->base.lpt_channels_num = 1;
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compressor->base.options.bits.DUMMY_BACKEND = false;
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/*
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* check if this system has more than 1 dram channel; if only 1 then lpt
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* should not be supported
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*/
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compressor->base.options.bits.CLK_GATING_DISABLED = false;
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compressor->base.ctx = ctx;
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compressor->base.embedded_panel_h_size = 0;
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compressor->base.embedded_panel_v_size = 0;
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compressor->base.memory_bus_width = ctx->asic_id.vram_width;
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compressor->base.allocated_size = 0;
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compressor->base.preferred_requested_size = 0;
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compressor->base.min_compress_ratio = FBC_COMPRESS_RATIO_INVALID;
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compressor->base.options.raw = 0;
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compressor->base.banks_num = 0;
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compressor->base.raw_size = 0;
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compressor->base.channel_interleave_size = 0;
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compressor->base.dram_channels_num = 0;
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compressor->base.lpt_channels_num = 0;
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compressor->base.attached_inst = 0;
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compressor->base.is_enabled = false;
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#ifdef ENABLE_FBC
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compressor->base.funcs = &dce110_compressor_funcs;
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#endif
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return true;
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}
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@ -50,7 +50,7 @@ void dce110_compressor_destroy(struct compressor **cp);
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/* FBC RELATED */
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void dce110_compressor_power_up_fbc(struct compressor *cp);
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void dce110_compressor_enable_fbc(struct compressor *cp, uint32_t paths_num,
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void dce110_compressor_enable_fbc(struct compressor *cp,
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struct compr_addr_and_pitch_params *params);
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void dce110_compressor_disable_fbc(struct compressor *cp);
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@ -33,6 +33,10 @@
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#include "dce110_timing_generator.h"
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#include "dce/dce_hwseq.h"
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#ifdef ENABLE_FBC
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#include "dce110_compressor.h"
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#endif
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#include "bios/bios_parser_helper.h"
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#include "timing_generator.h"
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#include "mem_input.h"
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@ -1166,6 +1170,10 @@ static void power_down_all_hw_blocks(struct core_dc *dc)
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power_down_controllers(dc);
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power_down_clock_sources(dc);
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#ifdef ENABLE_FBC
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dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);
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#endif
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}
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static void disable_vga_and_power_gate_all_controllers(
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@ -1630,6 +1638,10 @@ enum dc_status dce110_apply_ctx_to_hw(
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}
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set_safe_displaymarks(&context->res_ctx, dc->res_pool);
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#ifdef ENABLE_FBC
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dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);
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#endif
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/*TODO: when pplib works*/
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apply_min_clocks(dc, context, &clocks_state, true);
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@ -2215,6 +2227,9 @@ static void init_hw(struct core_dc *dc)
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abm->funcs->init_backlight(abm);
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abm->funcs->abm_init(abm);
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}
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#ifdef ENABLE_FBC
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dc->fbc_compressor->funcs->power_up_fbc(dc->fbc_compressor);
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#endif
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}
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void dce110_fill_display_configs(
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@ -52,6 +52,10 @@
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#include "dce/dce_abm.h"
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#include "dce/dce_dmcu.h"
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#ifdef ENABLE_FBC
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#include "dce110/dce110_compressor.h"
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#endif
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#include "reg_helper.h"
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#include "dce/dce_11_0_d.h"
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@ -1347,6 +1351,12 @@ static bool construct(
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}
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}
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#ifdef ENABLE_FBC
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dc->fbc_compressor = dce110_compressor_create(ctx);
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#endif
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if (!underlay_create(ctx, &pool->base))
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goto res_create_fail;
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@ -45,7 +45,7 @@ union fbc_physical_address {
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};
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struct compr_addr_and_pitch_params {
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enum controller_id controller_id;
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/* enum controller_id controller_id; */
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uint32_t inst;
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uint32_t source_view_width;
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uint32_t source_view_height;
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@ -63,7 +63,7 @@ struct compressor;
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struct compressor_funcs {
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void (*power_up_fbc)(struct compressor *cp);
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void (*enable_fbc)(struct compressor *cp, uint32_t paths_num,
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void (*enable_fbc)(struct compressor *cp,
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struct compr_addr_and_pitch_params *params);
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void (*disable_fbc)(struct compressor *cp);
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void (*set_fbc_invalidation_triggers)(struct compressor *cp,
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@ -78,7 +78,7 @@ struct compressor {
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struct dc_context *ctx;
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uint32_t attached_inst;
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bool is_enabled;
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const struct compressor_funcs funcs;
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const struct compressor_funcs *funcs;
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union {
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uint32_t raw;
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struct {
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@ -10,6 +10,7 @@
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#include "core_types.h"
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#include "hw_sequencer.h"
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#include "compressor.h"
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#define DC_TO_CORE(dc)\
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container_of(dc, struct core_dc, public)
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@ -44,6 +45,11 @@ struct core_dc {
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* to compare to see if display config changed
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*/
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struct dm_pp_display_configuration prev_display_config;
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/* FBC compressor */
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#ifdef ENABLE_FBC
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struct compressor *fbc_compressor;
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#endif
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};
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#endif /* __CORE_DC_H__ */
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