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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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intelfb: add p divisor increments for i9xx.
Signed-off-by: Dave Airlie <airlied@linux.ie>
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@ -49,6 +49,7 @@ struct pll_min_max {
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int min_p1, max_p1;
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int min_p1, max_p1;
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int min_vco_freq, max_vco_freq;
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int min_vco_freq, max_vco_freq;
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int p_transition_clock;
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int p_transition_clock;
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int p_inc_lo, p_inc_hi;
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};
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};
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#define PLLS_I8xx 0
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#define PLLS_I8xx 0
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@ -56,8 +57,8 @@ struct pll_min_max {
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#define PLLS_MAX 2
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#define PLLS_MAX 2
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struct pll_min_max plls[PLLS_MAX] = {
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struct pll_min_max plls[PLLS_MAX] = {
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{ 108, 140, 18, 26, 6, 16, 3, 16, 4, 128, 0, 31, 930000, 1400000, 165000 }, //I8xx
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{ 108, 140, 18, 26, 6, 16, 3, 16, 4, 128, 0, 31, 930000, 1400000, 165000, 4, 22 }, //I8xx
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{ 75, 120, 10, 20, 5, 9, 4, 7, 5, 80, 1, 8, 930000, 2800000, 200000 } //I9xx
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{ 75, 120, 10, 20, 5, 9, 4, 7, 5, 80, 1, 8, 930000, 2800000, 200000, 10, 5 } //I9xx
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};
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};
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int
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int
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@ -822,15 +823,15 @@ calc_pll_params(int index, int clock, u32 *retm1, u32 *retm2, u32 *retn, u32 *re
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div_min = ROUND_UP_TO(plls[index].min_vco_freq, clock) / clock;
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div_min = ROUND_UP_TO(plls[index].min_vco_freq, clock) / clock;
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if (clock <= plls[index].p_transition_clock)
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if (clock <= plls[index].p_transition_clock)
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p_inc = 4;
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p_inc = plls[index].p_inc_lo;
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else
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else
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p_inc = 2;
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p_inc = plls[index].p_inc_hi;
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p_min = ROUND_UP_TO(div_min, p_inc);
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p_min = ROUND_UP_TO(div_min, p_inc);
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p_max = ROUND_DOWN_TO(div_max, p_inc);
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p_max = ROUND_DOWN_TO(div_max, p_inc);
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if (p_min < plls[index].min_p)
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if (p_min < plls[index].min_p)
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p_min = 4;
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p_min = plls[index].min_p;
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if (p_max > plls[index].max_p)
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if (p_max > plls[index].max_p)
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p_max = 128;
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p_max = plls[index].max_p;
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DBG_MSG("p range is %d-%d (%d)\n", p_min, p_max, p_inc);
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DBG_MSG("p range is %d-%d (%d)\n", p_min, p_max, p_inc);
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