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iwlwifi: pcie: use shadow registers for updating write pointer

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The RX queues have a shadow register for the write pointer
that enables updates without grabbing NIC access. Use them
instead of the periphery registers because accessing those
is much more expensive.

Signed-off-by: Sara Sharon <sara.sharon@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
This commit is contained in:
Sara Sharon 2016-04-17 15:08:59 +03:00 committed by Luca Coelho
parent cf961e1662
commit 1554ed2088
2 changed files with 5 additions and 2 deletions
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3
drivers/net/wireless/intel/iwlwifi/iwl-fh.h
View File

@ -321,6 +321,9 @@ static inline unsigned int FH_MEM_CBBC_QUEUE(unsigned int chnl)
/* Write index table */ /* Write index table */
#define RFH_Q0_FRBDCB_WIDX 0xA08080 #define RFH_Q0_FRBDCB_WIDX 0xA08080
#define RFH_Q_FRBDCB_WIDX(q) (RFH_Q0_FRBDCB_WIDX + (q) * 4) #define RFH_Q_FRBDCB_WIDX(q) (RFH_Q0_FRBDCB_WIDX + (q) * 4)
/* Write index table - shadow registers */
#define RFH_Q0_FRBDCB_WIDX_TRG 0x1C80
#define RFH_Q_FRBDCB_WIDX_TRG(q) (RFH_Q0_FRBDCB_WIDX_TRG + (q) * 4)
/* Read index table */ /* Read index table */
#define RFH_Q0_FRBDCB_RIDX 0xA080C0 #define RFH_Q0_FRBDCB_RIDX 0xA080C0
#define RFH_Q_FRBDCB_RIDX(q) (RFH_Q0_FRBDCB_RIDX + (q) * 4) #define RFH_Q_FRBDCB_RIDX(q) (RFH_Q0_FRBDCB_RIDX + (q) * 4)

4
drivers/net/wireless/intel/iwlwifi/pcie/rx.c
View File

@ -208,8 +208,8 @@ static void iwl_pcie_rxq_inc_wr_ptr(struct iwl_trans *trans,
rxq->write_actual = round_down(rxq->write, 8); rxq->write_actual = round_down(rxq->write, 8);
if (trans->cfg->mq_rx_supported) if (trans->cfg->mq_rx_supported)
iwl_write_prph(trans, RFH_Q_FRBDCB_WIDX(rxq->id), iwl_write32(trans, RFH_Q_FRBDCB_WIDX_TRG(rxq->id),
rxq->write_actual); rxq->write_actual);
/* /*
* write to FH_RSCSR_CHNL0_WPTR register even in MQ as a W/A to * write to FH_RSCSR_CHNL0_WPTR register even in MQ as a W/A to
* hardware shadow registers bug - writing to RFH_Q_FRBDCB_WIDX will * hardware shadow registers bug - writing to RFH_Q_FRBDCB_WIDX will