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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-27 04:30:53 +07:00
drm/tegra: Atomic conversion, phase 3, step 3
Provide a custom ->atomic_commit() implementation which supports async commits. The generic atomic page-flip helper can use this to implement page-flipping. Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding
parent
74f48791ad
commit
1503ca47d7
@ -820,99 +820,6 @@ static int tegra_dc_add_planes(struct drm_device *drm, struct tegra_dc *dc)
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return 0;
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}
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static int tegra_dc_set_base(struct tegra_dc *dc, int x, int y,
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struct drm_framebuffer *fb)
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{
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struct tegra_bo *bo = tegra_fb_get_plane(fb, 0);
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unsigned int h_offset = 0, v_offset = 0;
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struct tegra_bo_tiling tiling;
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unsigned long value, flags;
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unsigned int format, swap;
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int err;
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err = tegra_fb_get_tiling(fb, &tiling);
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if (err < 0)
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return err;
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spin_lock_irqsave(&dc->lock, flags);
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tegra_dc_writel(dc, WINDOW_A_SELECT, DC_CMD_DISPLAY_WINDOW_HEADER);
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value = fb->offsets[0] + y * fb->pitches[0] +
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x * fb->bits_per_pixel / 8;
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tegra_dc_writel(dc, bo->paddr + value, DC_WINBUF_START_ADDR);
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tegra_dc_writel(dc, fb->pitches[0], DC_WIN_LINE_STRIDE);
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format = tegra_dc_format(fb->pixel_format, &swap);
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tegra_dc_writel(dc, format, DC_WIN_COLOR_DEPTH);
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tegra_dc_writel(dc, swap, DC_WIN_BYTE_SWAP);
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if (dc->soc->supports_block_linear) {
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unsigned long height = tiling.value;
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switch (tiling.mode) {
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case TEGRA_BO_TILING_MODE_PITCH:
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value = DC_WINBUF_SURFACE_KIND_PITCH;
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break;
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case TEGRA_BO_TILING_MODE_TILED:
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value = DC_WINBUF_SURFACE_KIND_TILED;
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break;
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case TEGRA_BO_TILING_MODE_BLOCK:
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value = DC_WINBUF_SURFACE_KIND_BLOCK_HEIGHT(height) |
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DC_WINBUF_SURFACE_KIND_BLOCK;
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break;
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}
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tegra_dc_writel(dc, value, DC_WINBUF_SURFACE_KIND);
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} else {
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switch (tiling.mode) {
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case TEGRA_BO_TILING_MODE_PITCH:
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value = DC_WIN_BUFFER_ADDR_MODE_LINEAR_UV |
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DC_WIN_BUFFER_ADDR_MODE_LINEAR;
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break;
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case TEGRA_BO_TILING_MODE_TILED:
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value = DC_WIN_BUFFER_ADDR_MODE_TILE_UV |
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DC_WIN_BUFFER_ADDR_MODE_TILE;
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break;
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case TEGRA_BO_TILING_MODE_BLOCK:
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DRM_ERROR("hardware doesn't support block linear mode\n");
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spin_unlock_irqrestore(&dc->lock, flags);
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return -EINVAL;
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}
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tegra_dc_writel(dc, value, DC_WIN_BUFFER_ADDR_MODE);
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}
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/* make sure bottom-up buffers are properly displayed */
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if (tegra_fb_is_bottom_up(fb)) {
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value = tegra_dc_readl(dc, DC_WIN_WIN_OPTIONS);
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value |= V_DIRECTION;
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tegra_dc_writel(dc, value, DC_WIN_WIN_OPTIONS);
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v_offset += fb->height - 1;
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} else {
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value = tegra_dc_readl(dc, DC_WIN_WIN_OPTIONS);
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value &= ~V_DIRECTION;
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tegra_dc_writel(dc, value, DC_WIN_WIN_OPTIONS);
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}
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tegra_dc_writel(dc, h_offset, DC_WINBUF_ADDR_H_OFFSET);
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tegra_dc_writel(dc, v_offset, DC_WINBUF_ADDR_V_OFFSET);
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value = GENERAL_ACT_REQ | WIN_A_ACT_REQ;
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tegra_dc_writel(dc, value << 8, DC_CMD_STATE_CONTROL);
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tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
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spin_unlock_irqrestore(&dc->lock, flags);
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return 0;
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}
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void tegra_dc_enable_vblank(struct tegra_dc *dc)
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{
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unsigned long value, flags;
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@ -991,30 +898,6 @@ void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file)
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spin_unlock_irqrestore(&drm->event_lock, flags);
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}
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static int tegra_dc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event, uint32_t page_flip_flags)
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{
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unsigned int pipe = drm_crtc_index(crtc);
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struct tegra_dc *dc = to_tegra_dc(crtc);
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if (dc->event)
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return -EBUSY;
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if (event) {
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event->pipe = pipe;
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dc->event = event;
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drm_crtc_vblank_get(crtc);
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}
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if (crtc->primary->state)
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drm_atomic_set_fb_for_plane(crtc->primary->state, fb);
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tegra_dc_set_base(dc, 0, 0, fb);
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crtc->primary->fb = fb;
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return 0;
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}
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static void tegra_dc_destroy(struct drm_crtc *crtc)
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{
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drm_crtc_cleanup(crtc);
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@ -1056,7 +939,7 @@ static void tegra_crtc_atomic_destroy_state(struct drm_crtc *crtc,
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}
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static const struct drm_crtc_funcs tegra_crtc_funcs = {
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.page_flip = tegra_dc_page_flip,
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.page_flip = drm_atomic_helper_page_flip,
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.set_config = drm_atomic_helper_set_config,
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.destroy = tegra_dc_destroy,
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.reset = tegra_crtc_reset,
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@ -1326,6 +1209,16 @@ static int tegra_crtc_atomic_check(struct drm_crtc *crtc,
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static void tegra_crtc_atomic_begin(struct drm_crtc *crtc)
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{
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struct tegra_dc *dc = to_tegra_dc(crtc);
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if (crtc->state->event) {
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crtc->state->event->pipe = drm_crtc_index(crtc);
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WARN_ON(drm_crtc_vblank_get(crtc) != 0);
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dc->event = crtc->state->event;
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crtc->state->event = NULL;
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}
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}
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static void tegra_crtc_atomic_flush(struct drm_crtc *crtc)
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@ -10,6 +10,7 @@
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#include <linux/host1x.h>
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#include <linux/iommu.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include "drm.h"
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@ -26,13 +27,90 @@ struct tegra_drm_file {
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struct list_head contexts;
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};
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static void tegra_atomic_schedule(struct tegra_drm *tegra,
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struct drm_atomic_state *state)
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{
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tegra->commit.state = state;
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schedule_work(&tegra->commit.work);
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}
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static void tegra_atomic_complete(struct tegra_drm *tegra,
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struct drm_atomic_state *state)
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{
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struct drm_device *drm = tegra->drm;
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/*
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* Everything below can be run asynchronously without the need to grab
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* any modeset locks at all under one condition: It must be guaranteed
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* that the asynchronous work has either been cancelled (if the driver
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* supports it, which at least requires that the framebuffers get
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* cleaned up with drm_atomic_helper_cleanup_planes()) or completed
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* before the new state gets committed on the software side with
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* drm_atomic_helper_swap_state().
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*
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* This scheme allows new atomic state updates to be prepared and
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* checked in parallel to the asynchronous completion of the previous
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* update. Which is important since compositors need to figure out the
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* composition of the next frame right after having submitted the
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* current layout.
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*/
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drm_atomic_helper_commit_pre_planes(drm, state);
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drm_atomic_helper_commit_planes(drm, state);
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drm_atomic_helper_commit_post_planes(drm, state);
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drm_atomic_helper_wait_for_vblanks(drm, state);
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drm_atomic_helper_cleanup_planes(drm, state);
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drm_atomic_state_free(state);
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}
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static void tegra_atomic_work(struct work_struct *work)
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{
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struct tegra_drm *tegra = container_of(work, struct tegra_drm,
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commit.work);
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tegra_atomic_complete(tegra, tegra->commit.state);
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}
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static int tegra_atomic_commit(struct drm_device *drm,
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struct drm_atomic_state *state, bool async)
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{
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struct tegra_drm *tegra = drm->dev_private;
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int err;
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err = drm_atomic_helper_prepare_planes(drm, state);
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if (err)
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return err;
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/* serialize outstanding asynchronous commits */
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mutex_lock(&tegra->commit.lock);
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flush_work(&tegra->commit.work);
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/*
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* This is the point of no return - everything below never fails except
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* when the hw goes bonghits. Which means we can commit the new state on
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* the software side now.
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*/
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drm_atomic_helper_swap_state(drm, state);
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if (async)
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tegra_atomic_schedule(tegra, state);
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else
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tegra_atomic_complete(tegra, state);
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mutex_unlock(&tegra->commit.lock);
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return 0;
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}
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static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
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.fb_create = tegra_fb_create,
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#ifdef CONFIG_DRM_TEGRA_FBDEV
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.output_poll_changed = tegra_fb_output_poll_changed,
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#endif
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = drm_atomic_helper_commit,
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.atomic_commit = tegra_atomic_commit,
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};
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static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
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@ -58,6 +136,10 @@ static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
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mutex_init(&tegra->clients_lock);
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INIT_LIST_HEAD(&tegra->clients);
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mutex_init(&tegra->commit.lock);
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INIT_WORK(&tegra->commit.work, tegra_atomic_work);
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drm->dev_private = tegra;
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tegra->drm = drm;
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@ -50,6 +50,12 @@ struct tegra_drm {
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#endif
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unsigned int pitch_align;
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struct {
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struct drm_atomic_state *state;
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struct work_struct work;
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struct mutex lock;
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} commit;
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};
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struct tegra_drm_client;
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