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ARM: davinci: dm644x: switch to using the clocksource driver

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We now have a proper clocksource driver for davinci. Switch the dm644x
platform to using it.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This commit is contained in:
Bartosz Golaszewski 2019-07-22 15:17:46 +02:00 committed by Sekhar Nori
parent c0512c2ca3
commit 135ce780b7
1 changed files with 13 additions and 11 deletions
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24
arch/arm/mach-davinci/dm644x.c
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@ -27,7 +27,8 @@
#include <mach/cputype.h> #include <mach/cputype.h>
#include <mach/mux.h> #include <mach/mux.h>
#include <mach/serial.h> #include <mach/serial.h>
#include <mach/time.h>
#include <clocksource/timer-davinci.h>
#include "asp.h" #include "asp.h"
#include "davinci.h" #include "davinci.h"
@ -561,15 +562,15 @@ static struct davinci_id dm644x_ids[] = {
}; };
/* /*
* T0_BOT: Timer 0, bottom: clockevent source for hrtimers * Bottom half of timer0 is used for clockevent, top half is used for
* T0_TOP: Timer 0, top : clocksource for generic timekeeping * clocksource.
* T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code)
* T1_TOP: Timer 1, top : <unused>
*/ */
static struct davinci_timer_info dm644x_timer_info = { static const struct davinci_timer_cfg dm644x_timer_cfg = {
.timers = davinci_timer_instance, .reg = DEFINE_RES_IO(DAVINCI_TIMER0_BASE, SZ_4K),
.clockevent_id = T0_BOT, .irq = {
.clocksource_id = T0_TOP, DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT12)),
DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT34)),
},
}; };
static struct plat_serial8250_port dm644x_serial0_platform_data[] = { static struct plat_serial8250_port dm644x_serial0_platform_data[] = {
@ -647,7 +648,6 @@ static const struct davinci_soc_info davinci_soc_info_dm644x = {
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm644x_pins, .pinmux_pins = dm644x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm644x_pins), .pinmux_pins_num = ARRAY_SIZE(dm644x_pins),
.timer_info = &dm644x_timer_info,
.emac_pdata = &dm644x_emac_pdata, .emac_pdata = &dm644x_emac_pdata,
.sram_dma = 0x00008000, .sram_dma = 0x00008000,
.sram_len = SZ_16K, .sram_len = SZ_16K,
@ -669,6 +669,7 @@ void __init dm644x_init_time(void)
{ {
void __iomem *pll1, *psc; void __iomem *pll1, *psc;
struct clk *clk; struct clk *clk;
int rv;
clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM644X_REF_FREQ); clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM644X_REF_FREQ);
@ -684,7 +685,8 @@ void __init dm644x_init_time(void)
return; return;
} }
davinci_timer_init(clk); rv = davinci_timer_register(clk, &dm644x_timer_cfg);
WARN(rv, "Unable to register the timer: %d\n", rv);
} }
static struct resource dm644x_pll2_resources[] = { static struct resource dm644x_pll2_resources[] = {