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ARM: tegra: Device tree changes for v5.6-rc1

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This adds memory timings for the PAZ100 and does some minor cleanup for
 the external memory controller device tree node on Tegra124.
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Merge tag 'tegra-for-5.6-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

ARM: tegra: Device tree changes for v5.6-rc1

This adds memory timings for the PAZ100 and does some minor cleanup for
the external memory controller device tree node on Tegra124.

* tag 'tegra-for-5.6-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: dts: tegra20: paz00: Add memory timings
  ARM: tegra: Rename EMC on Tegra124
  ARM: tegra: Let the EMC hardware use the EMC clock

Link: https://lore.kernel.org/r/20200111003553.2411874-6-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2020-01-16 10:42:59 -08:00
commit 12c5beb980
6 changed files with 53 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/tegra124-apalis-emc.dtsi
View File

@ -84,7 +84,7 @@ timing-924000000 {
};
};
emc@7001b000 {
external-memory-controller@7001b000 {
emc-timings-1 {
nvidia,ram-code = <1>;

2
arch/arm/boot/dts/tegra124-jetson-tk1-emc.dtsi
View File

@ -79,7 +79,7 @@ timing-924000000 {
};
};
emc@7001b000 {
external-memory-controller@7001b000 {
emc-timings-3 {
nvidia,ram-code = <3>;

2
arch/arm/boot/dts/tegra124-nyan-big-emc.dtsi
View File

@ -219,7 +219,7 @@ timing-792000000 {
};
};
emc@7001b000 {
external-memory-controller@7001b000 {
emc-timings-1 {
nvidia,ram-code = <1>;

2
arch/arm/boot/dts/tegra124-nyan-blaze-emc.dtsi
View File

@ -68,7 +68,7 @@ timing-792000000 {
};
};
emc@7001b000 {
external-memory-controller@7001b000 {
emc-timings-1 {
nvidia,ram-code = <1>;

4
arch/arm/boot/dts/tegra124.dtsi
View File

@ -622,9 +622,11 @@ mc: memory-controller@70019000 {
#iommu-cells = <1>;
};
emc: emc@7001b000 {
emc: external-memory-controller@7001b000 {
compatible = "nvidia,tegra124-emc";
reg = <0x0 0x7001b000 0x0 0x1000>;
clocks = <&tegra_car TEGRA124_CLK_EMC>;
clock-names = "emc";
nvidia,memory-controller = <&mc>;
};

46
arch/arm/boot/dts/tegra20-paz00.dts
View File

@ -311,6 +311,52 @@ nvec@7000c500 {
reset-names = "i2c";
};
memory-controller@7000f400 {
nvidia,use-ram-code;
emc-tables@hynix {
nvidia,ram-code = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
emc-table@166500 {
reg = <166500>;
compatible = "nvidia,tegra20-emc-table";
clock-frequency = <166500>;
nvidia,emc-registers = <0x0000000a 0x00000016
0x00000008 0x00000003 0x00000004 0x00000004
0x00000002 0x0000000c 0x00000003 0x00000003
0x00000002 0x00000001 0x00000004 0x00000005
0x00000004 0x00000009 0x0000000d 0x000004df
0x00000000 0x00000003 0x00000003 0x00000003
0x00000003 0x00000001 0x0000000a 0x000000c8
0x00000003 0x00000006 0x00000004 0x00000008
0x00000002 0x00000000 0x00000000 0x00000002
0x00000000 0x00000000 0x00000083 0xe03b0323
0x007fe010 0x00001414 0x00000000 0x00000000
0x00000000 0x00000000 0x00000000 0x00000000>;
};
emc-table@333000 {
reg = <333000>;
compatible = "nvidia,tegra20-emc-table";
clock-frequency = <333000>;
nvidia,emc-registers = <0x00000018 0x00000033
0x00000012 0x00000004 0x00000004 0x00000005
0x00000003 0x0000000c 0x00000006 0x00000006
0x00000003 0x00000001 0x00000004 0x00000005
0x00000004 0x00000009 0x0000000d 0x00000bff
0x00000000 0x00000003 0x00000003 0x00000006
0x00000006 0x00000001 0x00000011 0x000000c8
0x00000003 0x0000000e 0x00000007 0x00000008
0x00000002 0x00000000 0x00000000 0x00000002
0x00000000 0x00000000 0x00000083 0xf0440303
0x007fe010 0x00001414 0x00000000 0x00000000
0x00000000 0x00000000 0x00000000 0x00000000>;
};
};
};
i2c@7000d000 {
status = "okay";
clock-frequency = <400000>;