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MMC: au1xmmc: Remove Alchemy CPU subtype dependencies
Replace all occurrences of CONFIG_SOC_AU1??? with runtime feature detection. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: linux-mmc@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2683/ Acked-by: Chris Ball <cjb@laptop.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss
Ralf Baechle
parent
ce1d43b9a9
commit
1177d99df2
@ -64,11 +64,8 @@
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#define AU1XMMC_DESCRIPTOR_COUNT 1
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/* max DMA seg size: 64KB on Au1100, 4MB on Au1200 */
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#ifdef CONFIG_SOC_AU1100
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#define AU1XMMC_DESCRIPTOR_SIZE 0x0000ffff
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#else /* Au1200 */
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#define AU1XMMC_DESCRIPTOR_SIZE 0x003fffff
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#endif
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#define AU1100_MMC_DESCRIPTOR_SIZE 0x0000ffff
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#define AU1200_MMC_DESCRIPTOR_SIZE 0x003fffff
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#define AU1XMMC_OCR (MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30 | \
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MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 | \
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@ -127,6 +124,7 @@ struct au1xmmc_host {
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#define HOST_F_XMIT 0x0001
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#define HOST_F_RECV 0x0002
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#define HOST_F_DMA 0x0010
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#define HOST_F_DBDMA 0x0020
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#define HOST_F_ACTIVE 0x0100
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#define HOST_F_STOP 0x1000
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@ -151,6 +149,16 @@ struct au1xmmc_host {
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#define DMA_CHANNEL(h) \
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(((h)->flags & HOST_F_XMIT) ? (h)->tx_chan : (h)->rx_chan)
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static inline int has_dbdma(void)
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{
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switch (alchemy_get_cputype()) {
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case ALCHEMY_CPU_AU1200:
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return 1;
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default:
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return 0;
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}
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}
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static inline void IRQ_ON(struct au1xmmc_host *host, u32 mask)
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{
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u32 val = au_readl(HOST_CONFIG(host));
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@ -353,14 +361,12 @@ static void au1xmmc_data_complete(struct au1xmmc_host *host, u32 status)
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data->bytes_xfered = 0;
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if (!data->error) {
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if (host->flags & HOST_F_DMA) {
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#ifdef CONFIG_SOC_AU1200 /* DBDMA */
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if (host->flags & (HOST_F_DMA | HOST_F_DBDMA)) {
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u32 chan = DMA_CHANNEL(host);
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chan_tab_t *c = *((chan_tab_t **)chan);
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au1x_dma_chan_t *cp = c->chan_ptr;
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data->bytes_xfered = cp->ddma_bytecnt;
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#endif
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} else
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data->bytes_xfered =
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(data->blocks * data->blksz) - host->pio.len;
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@ -570,11 +576,10 @@ static void au1xmmc_cmd_complete(struct au1xmmc_host *host, u32 status)
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host->status = HOST_S_DATA;
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if (host->flags & HOST_F_DMA) {
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#ifdef CONFIG_SOC_AU1200 /* DBDMA */
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if ((host->flags & (HOST_F_DMA | HOST_F_DBDMA))) {
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u32 channel = DMA_CHANNEL(host);
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/* Start the DMA as soon as the buffer gets something in it */
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/* Start the DBDMA as soon as the buffer gets something in it */
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if (host->flags & HOST_F_RECV) {
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u32 mask = SD_STATUS_DB | SD_STATUS_NE;
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@ -584,7 +589,6 @@ static void au1xmmc_cmd_complete(struct au1xmmc_host *host, u32 status)
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}
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au1xxx_dbdma_start(channel);
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#endif
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}
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}
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@ -633,8 +637,7 @@ static int au1xmmc_prepare_data(struct au1xmmc_host *host,
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au_writel(data->blksz - 1, HOST_BLKSIZE(host));
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if (host->flags & HOST_F_DMA) {
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#ifdef CONFIG_SOC_AU1200 /* DBDMA */
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if (host->flags & (HOST_F_DMA | HOST_F_DBDMA)) {
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int i;
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u32 channel = DMA_CHANNEL(host);
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@ -663,7 +666,6 @@ static int au1xmmc_prepare_data(struct au1xmmc_host *host,
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datalen -= len;
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}
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#endif
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} else {
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host->pio.index = 0;
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host->pio.offset = 0;
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@ -838,7 +840,6 @@ static irqreturn_t au1xmmc_irq(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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#ifdef CONFIG_SOC_AU1200
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/* 8bit memory DMA device */
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static dbdev_tab_t au1xmmc_mem_dbdev = {
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.dev_id = DSCR_CMD0_ALWAYS,
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@ -905,7 +906,7 @@ static int au1xmmc_dbdma_init(struct au1xmmc_host *host)
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au1xxx_dbdma_ring_alloc(host->rx_chan, AU1XMMC_DESCRIPTOR_COUNT);
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/* DBDMA is good to go */
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host->flags |= HOST_F_DMA;
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host->flags |= HOST_F_DMA | HOST_F_DBDMA;
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return 0;
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}
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@ -918,7 +919,6 @@ static void au1xmmc_dbdma_shutdown(struct au1xmmc_host *host)
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au1xxx_dbdma_chan_free(host->rx_chan);
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}
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}
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#endif
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static void au1xmmc_enable_sdio_irq(struct mmc_host *mmc, int en)
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{
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@ -997,8 +997,16 @@ static int __devinit au1xmmc_probe(struct platform_device *pdev)
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mmc->f_min = 450000;
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mmc->f_max = 24000000;
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mmc->max_seg_size = AU1XMMC_DESCRIPTOR_SIZE;
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mmc->max_segs = AU1XMMC_DESCRIPTOR_COUNT;
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switch (alchemy_get_cputype()) {
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case ALCHEMY_CPU_AU1100:
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mmc->max_seg_size = AU1100_MMC_DESCRIPTOR_SIZE;
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mmc->max_segs = AU1XMMC_DESCRIPTOR_COUNT;
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break;
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case ALCHEMY_CPU_AU1200:
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mmc->max_seg_size = AU1200_MMC_DESCRIPTOR_SIZE;
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mmc->max_segs = AU1XMMC_DESCRIPTOR_COUNT;
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break;
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}
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mmc->max_blk_size = 2048;
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mmc->max_blk_count = 512;
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@ -1028,11 +1036,12 @@ static int __devinit au1xmmc_probe(struct platform_device *pdev)
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tasklet_init(&host->finish_task, au1xmmc_tasklet_finish,
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(unsigned long)host);
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#ifdef CONFIG_SOC_AU1200
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ret = au1xmmc_dbdma_init(host);
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if (ret)
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printk(KERN_INFO DRIVER_NAME ": DBDMA init failed; using PIO\n");
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#endif
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if (has_dbdma()) {
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ret = au1xmmc_dbdma_init(host);
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if (ret)
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printk(KERN_INFO DRIVER_NAME ": DBDMA init failed; "
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"using PIO\n");
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}
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#ifdef CONFIG_LEDS_CLASS
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if (host->platdata && host->platdata->led) {
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@ -1073,9 +1082,8 @@ static int __devinit au1xmmc_probe(struct platform_device *pdev)
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au_writel(0, HOST_CONFIG2(host));
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au_sync();
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#ifdef CONFIG_SOC_AU1200
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au1xmmc_dbdma_shutdown(host);
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#endif
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if (host->flags & HOST_F_DBDMA)
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au1xmmc_dbdma_shutdown(host);
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tasklet_kill(&host->data_task);
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tasklet_kill(&host->finish_task);
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@ -1120,9 +1128,9 @@ static int __devexit au1xmmc_remove(struct platform_device *pdev)
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tasklet_kill(&host->data_task);
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tasklet_kill(&host->finish_task);
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#ifdef CONFIG_SOC_AU1200
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au1xmmc_dbdma_shutdown(host);
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#endif
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if (host->flags & HOST_F_DBDMA)
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au1xmmc_dbdma_shutdown(host);
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au1xmmc_set_power(host, 0);
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free_irq(host->irq, host);
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@ -1181,24 +1189,23 @@ static struct platform_driver au1xmmc_driver = {
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static int __init au1xmmc_init(void)
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{
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#ifdef CONFIG_SOC_AU1200
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/* DSCR_CMD0_ALWAYS has a stride of 32 bits, we need a stride
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* of 8 bits. And since devices are shared, we need to create
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* our own to avoid freaking out other devices.
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*/
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memid = au1xxx_ddma_add_device(&au1xmmc_mem_dbdev);
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if (!memid)
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printk(KERN_ERR "au1xmmc: cannot add memory dbdma dev\n");
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#endif
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if (has_dbdma()) {
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/* DSCR_CMD0_ALWAYS has a stride of 32 bits, we need a stride
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* of 8 bits. And since devices are shared, we need to create
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* our own to avoid freaking out other devices.
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*/
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memid = au1xxx_ddma_add_device(&au1xmmc_mem_dbdev);
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if (!memid)
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printk(KERN_ERR "au1xmmc: cannot add memory dbdma\n");
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}
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return platform_driver_register(&au1xmmc_driver);
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}
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static void __exit au1xmmc_exit(void)
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{
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#ifdef CONFIG_SOC_AU1200
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if (memid)
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if (has_dbdma() && memid)
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au1xxx_ddma_del_device(memid);
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#endif
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platform_driver_unregister(&au1xmmc_driver);
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}
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