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xhci: Add quirk to workaround the errata seen on Cavium Thunder-X2 Soc

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Implement workaround for ThunderX2 Errata-129 (documented in
CN99XX Known Issues" available at Cavium support site).
As per ThunderX2errata-129, USB 2 device may come up as USB 1
if a connection to a USB 1 device is followed by another connection to
a USB 2 device, the link will come up as USB 1 for the USB 2 device.

Resolution: Reset the PHY after the USB 1 device is disconnected.
The PHY reset sequence is done using private registers in XHCI register
space. After the PHY is reset we check for the PLL lock status and retry
the operation if it fails. From our tests, retrying 4 times is sufficient.

Add a new quirk flag XHCI_RESET_PLL_ON_DISCONNECT to invoke the workaround
in handle_xhci_port_status().

Cc: stable@vger.kernel.org
Signed-off-by: George Cherian <george.cherian@cavium.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Cherian, George 2018-11-09 17:21:22 +02:00 committed by Greg Kroah-Hartman
parent a5baeaeabc
commit 11644a7659
3 changed files with 40 additions and 1 deletions
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5
drivers/usb/host/xhci-pci.c
View File

@ -248,6 +248,11 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
if (pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241)
xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_7;
if ((pdev->vendor == PCI_VENDOR_ID_BROADCOM ||
pdev->vendor == PCI_VENDOR_ID_CAVIUM) &&
pdev->device == 0x9026)
xhci->quirks |= XHCI_RESET_PLL_ON_DISCONNECT;
if (xhci->quirks & XHCI_RESET_ON_RESUME)
xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
"QUIRK: Resetting on resume");

35
drivers/usb/host/xhci-ring.c
View File

@ -1521,6 +1521,35 @@ static void handle_device_notification(struct xhci_hcd *xhci,
usb_wakeup_notification(udev->parent, udev->portnum);
}
/*
* Quirk hanlder for errata seen on Cavium ThunderX2 processor XHCI
* Controller.
* As per ThunderX2errata-129 USB 2 device may come up as USB 1
* If a connection to a USB 1 device is followed by another connection
* to a USB 2 device.
*
* Reset the PHY after the USB device is disconnected if device speed
* is less than HCD_USB3.
* Retry the reset sequence max of 4 times checking the PLL lock status.
*
*/
static void xhci_cavium_reset_phy_quirk(struct xhci_hcd *xhci)
{
struct usb_hcd *hcd = xhci_to_hcd(xhci);
u32 pll_lock_check;
u32 retry_count = 4;
do {
/* Assert PHY reset */
writel(0x6F, hcd->regs + 0x1048);
udelay(10);
/* De-assert the PHY reset */
writel(0x7F, hcd->regs + 0x1048);
udelay(200);
pll_lock_check = readl(hcd->regs + 0x1070);
} while (!(pll_lock_check & 0x1) && --retry_count);
}
static void handle_port_status(struct xhci_hcd *xhci,
union xhci_trb *event)
{
@ -1654,8 +1683,12 @@ static void handle_port_status(struct xhci_hcd *xhci,
goto cleanup;
}
if (hcd->speed < HCD_USB3)
if (hcd->speed < HCD_USB3) {
xhci_test_and_clear_bit(xhci, port, PORT_PLC);
if ((xhci->quirks & XHCI_RESET_PLL_ON_DISCONNECT) &&
(portsc & PORT_CSC) && !(portsc & PORT_CONNECT))
xhci_cavium_reset_phy_quirk(xhci);
}
cleanup:
/* Update event ring dequeue pointer before dropping the lock */

1
drivers/usb/host/xhci.h
View File

@ -1849,6 +1849,7 @@ struct xhci_hcd {
#define XHCI_INTEL_USB_ROLE_SW BIT_ULL(31)
#define XHCI_ZERO_64B_REGS BIT_ULL(32)
#define XHCI_DEFAULT_PM_RUNTIME_ALLOW BIT_ULL(33)
#define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34)
unsigned int num_active_eps;
unsigned int limit_active_eps;