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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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net: dsa: mv88e6xxx: Move phy functions into phy.[ch]
The upcoming SERDES support will need to make use of PHY functions. Move them out into a file of there own. No code changes. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Andrew Lunn
David S. Miller
parent
03d1da3c05
commit
10fa5bfcd6
@ -4,4 +4,5 @@ mv88e6xxx-objs += global1.o
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mv88e6xxx-objs += global1_atu.o
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mv88e6xxx-objs += global1_vtu.o
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mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_GLOBAL2) += global2.o
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mv88e6xxx-objs += phy.o
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mv88e6xxx-objs += port.o
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@ -36,6 +36,7 @@
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#include "mv88e6xxx.h"
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#include "global1.h"
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#include "global2.h"
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#include "phy.h"
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#include "port.h"
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static void assert_reg_lock(struct mv88e6xxx_chip *chip)
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@ -221,21 +222,7 @@ int mv88e6xxx_write(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val)
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return 0;
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}
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static int mv88e6165_phy_read(struct mv88e6xxx_chip *chip,
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struct mii_bus *bus,
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int addr, int reg, u16 *val)
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{
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return mv88e6xxx_read(chip, addr, reg, val);
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}
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static int mv88e6165_phy_write(struct mv88e6xxx_chip *chip,
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struct mii_bus *bus,
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int addr, int reg, u16 val)
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{
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return mv88e6xxx_write(chip, addr, reg, val);
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}
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static struct mii_bus *mv88e6xxx_default_mdio_bus(struct mv88e6xxx_chip *chip)
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struct mii_bus *mv88e6xxx_default_mdio_bus(struct mv88e6xxx_chip *chip)
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{
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struct mv88e6xxx_mdio_bus *mdio_bus;
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@ -247,94 +234,6 @@ static struct mii_bus *mv88e6xxx_default_mdio_bus(struct mv88e6xxx_chip *chip)
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return mdio_bus->bus;
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}
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static int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy,
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int reg, u16 *val)
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{
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int addr = phy; /* PHY devices addresses start at 0x0 */
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struct mii_bus *bus;
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bus = mv88e6xxx_default_mdio_bus(chip);
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if (!bus)
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return -EOPNOTSUPP;
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if (!chip->info->ops->phy_read)
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return -EOPNOTSUPP;
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return chip->info->ops->phy_read(chip, bus, addr, reg, val);
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}
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static int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy,
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int reg, u16 val)
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{
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int addr = phy; /* PHY devices addresses start at 0x0 */
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struct mii_bus *bus;
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bus = mv88e6xxx_default_mdio_bus(chip);
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if (!bus)
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return -EOPNOTSUPP;
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if (!chip->info->ops->phy_write)
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return -EOPNOTSUPP;
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return chip->info->ops->phy_write(chip, bus, addr, reg, val);
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}
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static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)
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{
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if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_PHY_PAGE))
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return -EOPNOTSUPP;
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return mv88e6xxx_phy_write(chip, phy, PHY_PAGE, page);
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}
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static void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy)
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{
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int err;
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/* Restore PHY page Copper 0x0 for access via the registered MDIO bus */
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err = mv88e6xxx_phy_write(chip, phy, PHY_PAGE, PHY_PAGE_COPPER);
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if (unlikely(err)) {
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dev_err(chip->dev, "failed to restore PHY %d page Copper (%d)\n",
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phy, err);
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}
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}
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static int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
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u8 page, int reg, u16 *val)
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{
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int err;
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/* There is no paging for registers 22 */
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if (reg == PHY_PAGE)
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return -EINVAL;
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err = mv88e6xxx_phy_page_get(chip, phy, page);
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if (!err) {
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err = mv88e6xxx_phy_read(chip, phy, reg, val);
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mv88e6xxx_phy_page_put(chip, phy);
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}
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return err;
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}
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static int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
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u8 page, int reg, u16 val)
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{
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int err;
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/* There is no paging for registers 22 */
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if (reg == PHY_PAGE)
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return -EINVAL;
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err = mv88e6xxx_phy_page_get(chip, phy, page);
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if (!err) {
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err = mv88e6xxx_phy_write(chip, phy, PHY_PAGE, page);
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mv88e6xxx_phy_page_put(chip, phy);
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}
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return err;
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}
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static int mv88e6xxx_serdes_read(struct mv88e6xxx_chip *chip, int reg, u16 *val)
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{
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return mv88e6xxx_phy_page_read(chip, ADDR_SERDES, SERDES_PAGE_FIBER,
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@ -560,122 +459,6 @@ int mv88e6xxx_update(struct mv88e6xxx_chip *chip, int addr, int reg, u16 update)
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return mv88e6xxx_write(chip, addr, reg, val);
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}
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static int mv88e6xxx_ppu_disable(struct mv88e6xxx_chip *chip)
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{
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if (!chip->info->ops->ppu_disable)
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return 0;
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return chip->info->ops->ppu_disable(chip);
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}
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static int mv88e6xxx_ppu_enable(struct mv88e6xxx_chip *chip)
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{
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if (!chip->info->ops->ppu_enable)
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return 0;
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return chip->info->ops->ppu_enable(chip);
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}
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static void mv88e6xxx_ppu_reenable_work(struct work_struct *ugly)
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{
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struct mv88e6xxx_chip *chip;
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chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work);
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mutex_lock(&chip->reg_lock);
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if (mutex_trylock(&chip->ppu_mutex)) {
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if (mv88e6xxx_ppu_enable(chip) == 0)
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chip->ppu_disabled = 0;
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mutex_unlock(&chip->ppu_mutex);
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}
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mutex_unlock(&chip->reg_lock);
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}
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static void mv88e6xxx_ppu_reenable_timer(unsigned long _ps)
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{
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struct mv88e6xxx_chip *chip = (void *)_ps;
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schedule_work(&chip->ppu_work);
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}
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static int mv88e6xxx_ppu_access_get(struct mv88e6xxx_chip *chip)
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{
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int ret;
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mutex_lock(&chip->ppu_mutex);
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/* If the PHY polling unit is enabled, disable it so that
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* we can access the PHY registers. If it was already
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* disabled, cancel the timer that is going to re-enable
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* it.
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*/
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if (!chip->ppu_disabled) {
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ret = mv88e6xxx_ppu_disable(chip);
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if (ret < 0) {
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mutex_unlock(&chip->ppu_mutex);
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return ret;
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}
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chip->ppu_disabled = 1;
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} else {
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del_timer(&chip->ppu_timer);
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ret = 0;
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}
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return ret;
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}
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static void mv88e6xxx_ppu_access_put(struct mv88e6xxx_chip *chip)
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{
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/* Schedule a timer to re-enable the PHY polling unit. */
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mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10));
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mutex_unlock(&chip->ppu_mutex);
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}
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static void mv88e6xxx_ppu_state_init(struct mv88e6xxx_chip *chip)
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{
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mutex_init(&chip->ppu_mutex);
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INIT_WORK(&chip->ppu_work, mv88e6xxx_ppu_reenable_work);
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setup_timer(&chip->ppu_timer, mv88e6xxx_ppu_reenable_timer,
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(unsigned long)chip);
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}
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static void mv88e6xxx_ppu_state_destroy(struct mv88e6xxx_chip *chip)
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{
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del_timer_sync(&chip->ppu_timer);
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}
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static int mv88e6xxx_phy_ppu_read(struct mv88e6xxx_chip *chip,
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struct mii_bus *bus,
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int addr, int reg, u16 *val)
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{
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int err;
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err = mv88e6xxx_ppu_access_get(chip);
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if (!err) {
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err = mv88e6xxx_read(chip, addr, reg, val);
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mv88e6xxx_ppu_access_put(chip);
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}
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return err;
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}
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static int mv88e6xxx_phy_ppu_write(struct mv88e6xxx_chip *chip,
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struct mii_bus *bus,
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int addr, int reg, u16 val)
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{
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int err;
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err = mv88e6xxx_ppu_access_get(chip);
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if (!err) {
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err = mv88e6xxx_write(chip, addr, reg, val);
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mv88e6xxx_ppu_access_put(chip);
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}
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return err;
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}
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static int mv88e6xxx_port_setup_mac(struct mv88e6xxx_chip *chip, int port,
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int link, int speed, int duplex,
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phy_interface_t mode)
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@ -3914,18 +3697,6 @@ static struct mv88e6xxx_chip *mv88e6xxx_alloc_chip(struct device *dev)
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return chip;
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}
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static void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip)
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{
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if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
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mv88e6xxx_ppu_state_init(chip);
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}
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static void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip)
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{
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if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
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mv88e6xxx_ppu_state_destroy(chip);
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}
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static int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip,
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struct mii_bus *bus, int sw_addr)
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{
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@ -942,5 +942,5 @@ int mv88e6xxx_write(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val);
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int mv88e6xxx_update(struct mv88e6xxx_chip *chip, int addr, int reg,
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u16 update);
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int mv88e6xxx_wait(struct mv88e6xxx_chip *chip, int addr, int reg, u16 mask);
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struct mii_bus *mv88e6xxx_default_mdio_bus(struct mv88e6xxx_chip *chip);
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#endif
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246
drivers/net/dsa/mv88e6xxx/phy.c
Normal file
246
drivers/net/dsa/mv88e6xxx/phy.c
Normal file
@ -0,0 +1,246 @@
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/*
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* Marvell 88e6xxx Ethernet switch PHY and PPU support
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*
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* Copyright (c) 2008 Marvell Semiconductor
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*
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* Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/mdio.h>
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#include <linux/module.h>
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#include <net/dsa.h>
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#include "mv88e6xxx.h"
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#include "phy.h"
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int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
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int addr, int reg, u16 *val)
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{
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return mv88e6xxx_read(chip, addr, reg, val);
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}
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int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
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int addr, int reg, u16 val)
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{
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return mv88e6xxx_write(chip, addr, reg, val);
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}
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int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val)
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{
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int addr = phy; /* PHY devices addresses start at 0x0 */
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struct mii_bus *bus;
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bus = mv88e6xxx_default_mdio_bus(chip);
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if (!bus)
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return -EOPNOTSUPP;
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if (!chip->info->ops->phy_read)
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return -EOPNOTSUPP;
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return chip->info->ops->phy_read(chip, bus, addr, reg, val);
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}
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int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val)
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{
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int addr = phy; /* PHY devices addresses start at 0x0 */
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struct mii_bus *bus;
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bus = mv88e6xxx_default_mdio_bus(chip);
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if (!bus)
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return -EOPNOTSUPP;
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if (!chip->info->ops->phy_write)
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return -EOPNOTSUPP;
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return chip->info->ops->phy_write(chip, bus, addr, reg, val);
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}
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static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)
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{
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if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_PHY_PAGE))
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return -EOPNOTSUPP;
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return mv88e6xxx_phy_write(chip, phy, PHY_PAGE, page);
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}
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static void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy)
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{
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int err;
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/* Restore PHY page Copper 0x0 for access via the registered
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* MDIO bus
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*/
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err = mv88e6xxx_phy_write(chip, phy, PHY_PAGE, PHY_PAGE_COPPER);
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if (unlikely(err)) {
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dev_err(chip->dev,
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"failed to restore PHY %d page Copper (%d)\n",
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phy, err);
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}
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}
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int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
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u8 page, int reg, u16 *val)
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{
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int err;
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/* There is no paging for registers 22 */
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if (reg == PHY_PAGE)
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return -EINVAL;
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err = mv88e6xxx_phy_page_get(chip, phy, page);
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if (!err) {
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err = mv88e6xxx_phy_read(chip, phy, reg, val);
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mv88e6xxx_phy_page_put(chip, phy);
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}
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return err;
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}
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int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
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u8 page, int reg, u16 val)
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{
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int err;
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/* There is no paging for registers 22 */
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if (reg == PHY_PAGE)
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return -EINVAL;
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err = mv88e6xxx_phy_page_get(chip, phy, page);
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if (!err) {
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err = mv88e6xxx_phy_write(chip, phy, PHY_PAGE, page);
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mv88e6xxx_phy_page_put(chip, phy);
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}
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return err;
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}
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static int mv88e6xxx_ppu_disable(struct mv88e6xxx_chip *chip)
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{
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if (!chip->info->ops->ppu_disable)
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return 0;
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return chip->info->ops->ppu_disable(chip);
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}
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int mv88e6xxx_ppu_enable(struct mv88e6xxx_chip *chip)
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{
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if (!chip->info->ops->ppu_enable)
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return 0;
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return chip->info->ops->ppu_enable(chip);
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}
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static void mv88e6xxx_ppu_reenable_work(struct work_struct *ugly)
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{
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struct mv88e6xxx_chip *chip;
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chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work);
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mutex_lock(&chip->reg_lock);
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if (mutex_trylock(&chip->ppu_mutex)) {
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if (mv88e6xxx_ppu_enable(chip) == 0)
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chip->ppu_disabled = 0;
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mutex_unlock(&chip->ppu_mutex);
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}
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mutex_unlock(&chip->reg_lock);
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}
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static void mv88e6xxx_ppu_reenable_timer(unsigned long _ps)
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{
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struct mv88e6xxx_chip *chip = (void *)_ps;
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schedule_work(&chip->ppu_work);
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}
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static int mv88e6xxx_ppu_access_get(struct mv88e6xxx_chip *chip)
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{
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int ret;
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mutex_lock(&chip->ppu_mutex);
|
||||
|
||||
/* If the PHY polling unit is enabled, disable it so that
|
||||
* we can access the PHY registers. If it was already
|
||||
* disabled, cancel the timer that is going to re-enable
|
||||
* it.
|
||||
*/
|
||||
if (!chip->ppu_disabled) {
|
||||
ret = mv88e6xxx_ppu_disable(chip);
|
||||
if (ret < 0) {
|
||||
mutex_unlock(&chip->ppu_mutex);
|
||||
return ret;
|
||||
}
|
||||
chip->ppu_disabled = 1;
|
||||
} else {
|
||||
del_timer(&chip->ppu_timer);
|
||||
ret = 0;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void mv88e6xxx_ppu_access_put(struct mv88e6xxx_chip *chip)
|
||||
{
|
||||
/* Schedule a timer to re-enable the PHY polling unit. */
|
||||
mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10));
|
||||
mutex_unlock(&chip->ppu_mutex);
|
||||
}
|
||||
|
||||
static void mv88e6xxx_ppu_state_init(struct mv88e6xxx_chip *chip)
|
||||
{
|
||||
mutex_init(&chip->ppu_mutex);
|
||||
INIT_WORK(&chip->ppu_work, mv88e6xxx_ppu_reenable_work);
|
||||
setup_timer(&chip->ppu_timer, mv88e6xxx_ppu_reenable_timer,
|
||||
(unsigned long)chip);
|
||||
}
|
||||
|
||||
static void mv88e6xxx_ppu_state_destroy(struct mv88e6xxx_chip *chip)
|
||||
{
|
||||
del_timer_sync(&chip->ppu_timer);
|
||||
}
|
||||
|
||||
int mv88e6xxx_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
|
||||
int addr, int reg, u16 *val)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = mv88e6xxx_ppu_access_get(chip);
|
||||
if (!err) {
|
||||
err = mv88e6xxx_read(chip, addr, reg, val);
|
||||
mv88e6xxx_ppu_access_put(chip);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
int mv88e6xxx_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
|
||||
int addr, int reg, u16 val)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = mv88e6xxx_ppu_access_get(chip);
|
||||
if (!err) {
|
||||
err = mv88e6xxx_write(chip, addr, reg, val);
|
||||
mv88e6xxx_ppu_access_put(chip);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip)
|
||||
{
|
||||
if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
|
||||
mv88e6xxx_ppu_state_init(chip);
|
||||
}
|
||||
|
||||
void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip)
|
||||
{
|
||||
if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
|
||||
mv88e6xxx_ppu_state_destroy(chip);
|
||||
}
|
||||
37
drivers/net/dsa/mv88e6xxx/phy.h
Normal file
37
drivers/net/dsa/mv88e6xxx/phy.h
Normal file
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Marvell 88E6xxx PHY access
|
||||
*
|
||||
* Copyright (c) 2008 Marvell Semiconductor
|
||||
*
|
||||
* Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef _MV88E6XXX_PHY_H
|
||||
#define _MV88E6XXX_PHY_H
|
||||
|
||||
int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
|
||||
int addr, int reg, u16 *val);
|
||||
int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
|
||||
int addr, int reg, u16 val);
|
||||
int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy,
|
||||
int reg, u16 *val);
|
||||
int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy,
|
||||
int reg, u16 val);
|
||||
int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
|
||||
u8 page, int reg, u16 *val);
|
||||
int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
|
||||
u8 page, int reg, u16 val);
|
||||
int mv88e6xxx_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
|
||||
int addr, int reg, u16 *val);
|
||||
int mv88e6xxx_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
|
||||
int addr, int reg, u16 val);
|
||||
int mv88e6xxx_ppu_enable(struct mv88e6xxx_chip *chip);
|
||||
void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip);
|
||||
void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip);
|
||||
|
||||
#endif /*_MV88E6XXX_PHY_H */
|
||||
Loading…
Reference in New Issue
Block a user