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agp/intel: Fix product names and #defines
IGD* isn't a useful name. Replace with the codenames, as sourced from pci.ids. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net>
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@ -36,10 +36,10 @@
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#define PCI_DEVICE_ID_INTEL_82965GME_IG 0x2A12
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#define PCI_DEVICE_ID_INTEL_82945GME_HB 0x27AC
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#define PCI_DEVICE_ID_INTEL_82945GME_IG 0x27AE
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#define PCI_DEVICE_ID_INTEL_IGDGM_HB 0xA010
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#define PCI_DEVICE_ID_INTEL_IGDGM_IG 0xA011
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#define PCI_DEVICE_ID_INTEL_IGDG_HB 0xA000
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#define PCI_DEVICE_ID_INTEL_IGDG_IG 0xA001
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#define PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB 0xA010
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#define PCI_DEVICE_ID_INTEL_PINEVIEW_M_IG 0xA011
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#define PCI_DEVICE_ID_INTEL_PINEVIEW_HB 0xA000
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#define PCI_DEVICE_ID_INTEL_PINEVIEW_IG 0xA001
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#define PCI_DEVICE_ID_INTEL_G33_HB 0x29C0
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#define PCI_DEVICE_ID_INTEL_G33_IG 0x29C2
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#define PCI_DEVICE_ID_INTEL_Q35_HB 0x29B0
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@ -50,19 +50,19 @@
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#define PCI_DEVICE_ID_INTEL_B43_IG 0x2E42
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#define PCI_DEVICE_ID_INTEL_GM45_HB 0x2A40
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#define PCI_DEVICE_ID_INTEL_GM45_IG 0x2A42
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#define PCI_DEVICE_ID_INTEL_IGD_E_HB 0x2E00
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#define PCI_DEVICE_ID_INTEL_IGD_E_IG 0x2E02
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#define PCI_DEVICE_ID_INTEL_EAGLELAKE_HB 0x2E00
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#define PCI_DEVICE_ID_INTEL_EAGLELAKE_IG 0x2E02
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#define PCI_DEVICE_ID_INTEL_Q45_HB 0x2E10
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#define PCI_DEVICE_ID_INTEL_Q45_IG 0x2E12
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#define PCI_DEVICE_ID_INTEL_G45_HB 0x2E20
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#define PCI_DEVICE_ID_INTEL_G45_IG 0x2E22
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#define PCI_DEVICE_ID_INTEL_G41_HB 0x2E30
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#define PCI_DEVICE_ID_INTEL_G41_IG 0x2E32
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#define PCI_DEVICE_ID_INTEL_IGDNG_D_HB 0x0040
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#define PCI_DEVICE_ID_INTEL_IGDNG_D_IG 0x0042
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#define PCI_DEVICE_ID_INTEL_IGDNG_M_HB 0x0044
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#define PCI_DEVICE_ID_INTEL_IGDNG_MA_HB 0x0062
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#define PCI_DEVICE_ID_INTEL_IGDNG_M_IG 0x0046
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#define PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB 0x0040
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#define PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG 0x0042
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#define PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB 0x0044
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#define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB 0x0062
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#define PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG 0x0046
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/* cover 915 and 945 variants */
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#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \
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@ -82,21 +82,21 @@
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#define IS_G33 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q33_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDGM_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDG_HB)
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_HB)
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#define IS_IGD (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDGM_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDG_HB)
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#define IS_PINEVIEW (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_HB)
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#define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_E_HB || \
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#define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_EAGLELAKE_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G41_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_B43_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_D_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_M_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MA_HB)
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB)
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extern int agp_memory_reserved;
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@ -651,7 +651,7 @@ static void intel_i830_init_gtt_entries(void)
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size = 512;
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}
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size += 4; /* add in BIOS popup space */
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} else if (IS_G33 && !IS_IGD) {
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} else if (IS_G33 && !IS_PINEVIEW) {
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/* G33's GTT size defined in gmch_ctrl */
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switch (gmch_ctrl & G33_PGETBL_SIZE_MASK) {
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case G33_PGETBL_SIZE_1M:
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@ -667,7 +667,7 @@ static void intel_i830_init_gtt_entries(void)
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size = 512;
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}
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size += 4;
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} else if (IS_G4X || IS_IGD) {
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} else if (IS_G4X || IS_PINEVIEW) {
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/* On 4 series hardware, GTT stolen is separate from graphics
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* stolen, ignore it in stolen gtt entries counting. However,
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* 4KB of the stolen memory doesn't get mapped to the GTT.
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@ -1356,14 +1356,14 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
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{
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switch (agp_bridge->dev->device) {
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case PCI_DEVICE_ID_INTEL_GM45_HB:
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case PCI_DEVICE_ID_INTEL_IGD_E_HB:
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case PCI_DEVICE_ID_INTEL_EAGLELAKE_HB:
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case PCI_DEVICE_ID_INTEL_Q45_HB:
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case PCI_DEVICE_ID_INTEL_G45_HB:
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case PCI_DEVICE_ID_INTEL_G41_HB:
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case PCI_DEVICE_ID_INTEL_B43_HB:
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case PCI_DEVICE_ID_INTEL_IGDNG_D_HB:
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case PCI_DEVICE_ID_INTEL_IGDNG_M_HB:
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case PCI_DEVICE_ID_INTEL_IGDNG_MA_HB:
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case PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB:
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case PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB:
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case PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB:
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*gtt_offset = *gtt_size = MB(2);
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break;
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default:
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@ -2343,14 +2343,14 @@ static const struct intel_driver_description {
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NULL, &intel_g33_driver },
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{ PCI_DEVICE_ID_INTEL_Q33_HB, PCI_DEVICE_ID_INTEL_Q33_IG, 0, "Q33",
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NULL, &intel_g33_driver },
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{ PCI_DEVICE_ID_INTEL_IGDGM_HB, PCI_DEVICE_ID_INTEL_IGDGM_IG, 0, "IGD",
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{ PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB, PCI_DEVICE_ID_INTEL_PINEVIEW_M_IG, 0, "Pineview",
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NULL, &intel_g33_driver },
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{ PCI_DEVICE_ID_INTEL_IGDG_HB, PCI_DEVICE_ID_INTEL_IGDG_IG, 0, "IGD",
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{ PCI_DEVICE_ID_INTEL_PINEVIEW_HB, PCI_DEVICE_ID_INTEL_PINEVIEW_IG, 0, "Pineview",
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NULL, &intel_g33_driver },
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{ PCI_DEVICE_ID_INTEL_GM45_HB, PCI_DEVICE_ID_INTEL_GM45_IG, 0,
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"Mobile Intel® GM45 Express", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_IGD_E_HB, PCI_DEVICE_ID_INTEL_IGD_E_IG, 0,
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"Intel Integrated Graphics Device", NULL, &intel_i965_driver },
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"GM45", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_EAGLELAKE_HB, PCI_DEVICE_ID_INTEL_EAGLELAKE_IG, 0,
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"Eaglelake", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_Q45_HB, PCI_DEVICE_ID_INTEL_Q45_IG, 0,
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"Q45/Q43", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_G45_HB, PCI_DEVICE_ID_INTEL_G45_IG, 0,
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@ -2359,12 +2359,12 @@ static const struct intel_driver_description {
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"B43", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_G41_HB, PCI_DEVICE_ID_INTEL_G41_IG, 0,
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"G41", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_IGDNG_D_HB, PCI_DEVICE_ID_INTEL_IGDNG_D_IG, 0,
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"IGDNG/D", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_IGDNG_M_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,
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"IGDNG/M", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_IGDNG_MA_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,
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"IGDNG/MA", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG, 0,
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"Ironlake/D", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG, 0,
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"Ironlake/M", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG, 0,
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"Ironlake/MA", NULL, &intel_i965_driver },
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{ 0, 0, 0, NULL, NULL, NULL }
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};
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@ -2541,8 +2541,8 @@ static struct pci_device_id agp_intel_pci_table[] = {
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ID(PCI_DEVICE_ID_INTEL_82945G_HB),
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ID(PCI_DEVICE_ID_INTEL_82945GM_HB),
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ID(PCI_DEVICE_ID_INTEL_82945GME_HB),
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ID(PCI_DEVICE_ID_INTEL_IGDGM_HB),
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ID(PCI_DEVICE_ID_INTEL_IGDG_HB),
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ID(PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB),
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ID(PCI_DEVICE_ID_INTEL_PINEVIEW_HB),
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ID(PCI_DEVICE_ID_INTEL_82946GZ_HB),
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ID(PCI_DEVICE_ID_INTEL_82G35_HB),
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ID(PCI_DEVICE_ID_INTEL_82965Q_HB),
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@ -2553,14 +2553,14 @@ static struct pci_device_id agp_intel_pci_table[] = {
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ID(PCI_DEVICE_ID_INTEL_Q35_HB),
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ID(PCI_DEVICE_ID_INTEL_Q33_HB),
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ID(PCI_DEVICE_ID_INTEL_GM45_HB),
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ID(PCI_DEVICE_ID_INTEL_IGD_E_HB),
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ID(PCI_DEVICE_ID_INTEL_EAGLELAKE_HB),
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ID(PCI_DEVICE_ID_INTEL_Q45_HB),
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ID(PCI_DEVICE_ID_INTEL_G45_HB),
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ID(PCI_DEVICE_ID_INTEL_G41_HB),
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ID(PCI_DEVICE_ID_INTEL_B43_HB),
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ID(PCI_DEVICE_ID_INTEL_IGDNG_D_HB),
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ID(PCI_DEVICE_ID_INTEL_IGDNG_M_HB),
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ID(PCI_DEVICE_ID_INTEL_IGDNG_MA_HB),
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ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB),
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ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),
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ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),
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{ }
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};
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