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x86/msr: Lift AMD family 0x15 power-specific MSRs
... into the global msr-index.h header because they're used in multiple compilation units. Sort the MSR list a bit. Update the msr-index.h copy in tools. No functional changes. Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Guenter Roeck <linux@roeck-us.net> Link: https://lkml.kernel.org/r/20200608164847.14232-1-bp@alien8.de
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@ -13,10 +13,6 @@
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#include <asm/cpu_device_id.h>
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#include "../perf_event.h"
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#define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a
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#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
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#define MSR_F15H_PTSC 0xc0010280
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/* Event code: LSB 8 bits, passed in attr->config any other bit is reserved. */
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#define AMD_POWER_EVENT_MASK 0xFFULL
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@ -418,15 +418,18 @@
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#define MSR_AMD64_PATCH_LEVEL 0x0000008b
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#define MSR_AMD64_TSC_RATIO 0xc0000104
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#define MSR_AMD64_NB_CFG 0xc001001f
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#define MSR_AMD64_CPUID_FN_1 0xc0011004
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#define MSR_AMD64_PATCH_LOADER 0xc0010020
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#define MSR_AMD_PERF_CTL 0xc0010062
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#define MSR_AMD_PERF_STATUS 0xc0010063
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#define MSR_AMD_PSTATE_DEF_BASE 0xc0010064
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#define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a
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#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
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#define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140
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#define MSR_AMD64_OSVW_STATUS 0xc0010141
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#define MSR_F15H_PTSC 0xc0010280
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#define MSR_AMD_PPIN_CTL 0xc00102f0
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#define MSR_AMD_PPIN 0xc00102f1
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#define MSR_AMD64_CPUID_FN_1 0xc0011004
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#define MSR_AMD64_LS_CFG 0xc0011020
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#define MSR_AMD64_DC_CFG 0xc0011022
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#define MSR_AMD64_BU_CFG2 0xc001102a
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@ -41,10 +41,6 @@ MODULE_LICENSE("GPL");
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/* set maximum interval as 1 second */
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#define MAX_INTERVAL 1000
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#define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a
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#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
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#define MSR_F15H_PTSC 0xc0010280
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#define PCI_DEVICE_ID_AMD_15H_M70H_NB_F4 0x15b4
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struct fam15h_power_data {
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@ -414,15 +414,18 @@
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#define MSR_AMD64_PATCH_LEVEL 0x0000008b
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#define MSR_AMD64_TSC_RATIO 0xc0000104
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#define MSR_AMD64_NB_CFG 0xc001001f
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#define MSR_AMD64_CPUID_FN_1 0xc0011004
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#define MSR_AMD64_PATCH_LOADER 0xc0010020
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#define MSR_AMD_PERF_CTL 0xc0010062
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#define MSR_AMD_PERF_STATUS 0xc0010063
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#define MSR_AMD_PSTATE_DEF_BASE 0xc0010064
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#define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a
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#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
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#define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140
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#define MSR_AMD64_OSVW_STATUS 0xc0010141
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#define MSR_F15H_PTSC 0xc0010280
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#define MSR_AMD_PPIN_CTL 0xc00102f0
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#define MSR_AMD_PPIN 0xc00102f1
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#define MSR_AMD64_CPUID_FN_1 0xc0011004
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#define MSR_AMD64_LS_CFG 0xc0011020
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#define MSR_AMD64_DC_CFG 0xc0011022
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#define MSR_AMD64_BU_CFG2 0xc001102a
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