AuxXxilium/linux_dsm_epyc7002
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ARM i.MX5: set CAN peripheral clock to 24 MHz parent

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This patch sets the parent of CAN peripheral clock (a.k.a. CPI clock) to the
lp_apm clock, which has a rate of 24 MHz.

In the CAN world a base clock with multiple of 8 MHz is suited best for all CIA
recommented bit rates. Without this patch the CAN peripheral clock on i.MX53
has a rate of 66.666 MHz which produces quite large bit rate errors.

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Marc Kleine-Budde 2013-11-25 22:15:21 +01:00 committed by Shawn Guo
parent a594790368
commit 10471fa3c7
1 changed files with 3 additions and 0 deletions
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3
arch/arm/mach-imx/clk-imx51-imx53.c
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@ -584,6 +584,9 @@ static void __init mx53_clocks_init(struct device_node *np)
clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
/* move can bus clk to 24MHz */
clk_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]);
clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
imx_print_silicon_rev("i.MX53", mx53_revision());
clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);