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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 04:35:20 +07:00
ath10k: clean up growing hw checks during safe and full reset
Store pci chip secific reset funtions in struct ath10k_pci as callbacks during early ath10k_pci_probe() and use the callback to perform chip specific resets. This patch essentially adds two callback in ath10k_pci, one for doing soft reset and the other for hard reset. By using callbacks we can get rid of those hw revision checks in ath10k_pci_safe_chip_reset() and ath10k_pci_chip_reset(). As such this patch does not fix any issue. Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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@ -2293,16 +2293,20 @@ static int ath10k_pci_warm_reset(struct ath10k *ar)
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return 0;
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}
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static int ath10k_pci_qca99x0_soft_chip_reset(struct ath10k *ar)
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{
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ath10k_pci_irq_disable(ar);
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return ath10k_pci_qca99x0_chip_reset(ar);
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}
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static int ath10k_pci_safe_chip_reset(struct ath10k *ar)
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{
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if (QCA_REV_988X(ar) || QCA_REV_6174(ar)) {
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return ath10k_pci_warm_reset(ar);
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} else if (QCA_REV_99X0(ar)) {
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ath10k_pci_irq_disable(ar);
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return ath10k_pci_qca99x0_chip_reset(ar);
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} else {
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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if (!ar_pci->pci_soft_reset)
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return -ENOTSUPP;
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}
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return ar_pci->pci_soft_reset(ar);
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}
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static int ath10k_pci_qca988x_chip_reset(struct ath10k *ar)
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@ -2437,16 +2441,12 @@ static int ath10k_pci_qca99x0_chip_reset(struct ath10k *ar)
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static int ath10k_pci_chip_reset(struct ath10k *ar)
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{
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if (QCA_REV_988X(ar))
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return ath10k_pci_qca988x_chip_reset(ar);
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else if (QCA_REV_6174(ar))
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return ath10k_pci_qca6174_chip_reset(ar);
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else if (QCA_REV_9377(ar))
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return ath10k_pci_qca6174_chip_reset(ar);
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else if (QCA_REV_99X0(ar))
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return ath10k_pci_qca99x0_chip_reset(ar);
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else
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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if (WARN_ON(!ar_pci->pci_hard_reset))
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return -ENOTSUPP;
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return ar_pci->pci_hard_reset(ar);
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}
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static int ath10k_pci_hif_power_up(struct ath10k *ar)
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@ -2976,24 +2976,34 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
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enum ath10k_hw_rev hw_rev;
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u32 chip_id;
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bool pci_ps;
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int (*pci_soft_reset)(struct ath10k *ar);
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int (*pci_hard_reset)(struct ath10k *ar);
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switch (pci_dev->device) {
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case QCA988X_2_0_DEVICE_ID:
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hw_rev = ATH10K_HW_QCA988X;
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pci_ps = false;
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pci_soft_reset = ath10k_pci_warm_reset;
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pci_hard_reset = ath10k_pci_qca988x_chip_reset;
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break;
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case QCA6164_2_1_DEVICE_ID:
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case QCA6174_2_1_DEVICE_ID:
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hw_rev = ATH10K_HW_QCA6174;
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pci_ps = true;
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pci_soft_reset = ath10k_pci_warm_reset;
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pci_hard_reset = ath10k_pci_qca6174_chip_reset;
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break;
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case QCA99X0_2_0_DEVICE_ID:
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hw_rev = ATH10K_HW_QCA99X0;
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pci_ps = false;
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pci_soft_reset = ath10k_pci_qca99x0_soft_chip_reset;
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pci_hard_reset = ath10k_pci_qca99x0_chip_reset;
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break;
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case QCA9377_1_0_DEVICE_ID:
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hw_rev = ATH10K_HW_QCA9377;
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pci_ps = true;
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pci_soft_reset = NULL;
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pci_hard_reset = ath10k_pci_qca6174_chip_reset;
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break;
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default:
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WARN_ON(1);
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@ -3018,6 +3028,8 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
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ar->dev_id = pci_dev->device;
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ar_pci->pci_ps = pci_ps;
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ar_pci->bus_ops = &ath10k_pci_bus_ops;
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ar_pci->pci_soft_reset = pci_soft_reset;
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ar_pci->pci_hard_reset = pci_hard_reset;
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ar->id.vendor = pdev->vendor;
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ar->id.device = pdev->device;
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@ -234,6 +234,12 @@ struct ath10k_pci {
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const struct ath10k_bus_ops *bus_ops;
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/* Chip specific pci reset routine used to do a safe reset */
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int (*pci_soft_reset)(struct ath10k *ar);
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/* Chip specific pci full reset function */
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int (*pci_hard_reset)(struct ath10k *ar);
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/* Keep this entry in the last, memory for struct ath10k_ahb is
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* allocated (ahb support enabled case) in the continuation of
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* this struct.
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