mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 08:06:44 +07:00
Merge git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers.git
Mark Brown reported that there are conflicts in iwlwifi between the two trees so fix those now.
This commit is contained in:
commit
0fac9e2dff
@ -3396,9 +3396,7 @@ static void ath10k_pci_remove(struct pci_dev *pdev)
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MODULE_DEVICE_TABLE(pci, ath10k_pci_id_table);
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#ifdef CONFIG_PM
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static int ath10k_pci_pm_suspend(struct device *dev)
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static __maybe_unused int ath10k_pci_pm_suspend(struct device *dev)
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{
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struct ath10k *ar = dev_get_drvdata(dev);
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int ret;
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@ -3414,7 +3412,7 @@ static int ath10k_pci_pm_suspend(struct device *dev)
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return ret;
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}
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static int ath10k_pci_pm_resume(struct device *dev)
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static __maybe_unused int ath10k_pci_pm_resume(struct device *dev)
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{
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struct ath10k *ar = dev_get_drvdata(dev);
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int ret;
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@ -3433,7 +3431,6 @@ static int ath10k_pci_pm_resume(struct device *dev)
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static SIMPLE_DEV_PM_OPS(ath10k_pci_pm_ops,
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ath10k_pci_pm_suspend,
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ath10k_pci_pm_resume);
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#endif
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static struct pci_driver ath10k_pci_driver = {
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.name = "ath10k_pci",
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@ -980,7 +980,7 @@ static void brcmf_escan_prep(struct brcmf_cfg80211_info *cfg,
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eth_broadcast_addr(params_le->bssid);
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params_le->bss_type = DOT11_BSSTYPE_ANY;
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params_le->scan_type = 0;
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params_le->scan_type = BRCMF_SCANTYPE_ACTIVE;
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params_le->channel_num = 0;
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params_le->nprobes = cpu_to_le32(-1);
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params_le->active_time = cpu_to_le32(-1);
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@ -988,12 +988,9 @@ static void brcmf_escan_prep(struct brcmf_cfg80211_info *cfg,
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params_le->home_time = cpu_to_le32(-1);
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memset(¶ms_le->ssid_le, 0, sizeof(params_le->ssid_le));
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/* if request is null exit so it will be all channel broadcast scan */
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if (!request)
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return;
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n_ssids = request->n_ssids;
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n_channels = request->n_channels;
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/* Copy channel array if applicable */
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brcmf_dbg(SCAN, "### List of channelspecs to scan ### %d\n",
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n_channels);
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@ -1030,16 +1027,8 @@ static void brcmf_escan_prep(struct brcmf_cfg80211_info *cfg,
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ptr += sizeof(ssid_le);
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}
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} else {
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brcmf_dbg(SCAN, "Broadcast scan %p\n", request->ssids);
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if ((request->ssids) && request->ssids->ssid_len) {
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brcmf_dbg(SCAN, "SSID %s len=%d\n",
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params_le->ssid_le.SSID,
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request->ssids->ssid_len);
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params_le->ssid_le.SSID_len =
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cpu_to_le32(request->ssids->ssid_len);
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memcpy(¶ms_le->ssid_le.SSID, request->ssids->ssid,
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request->ssids->ssid_len);
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}
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brcmf_dbg(SCAN, "Performing passive scan\n");
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params_le->scan_type = BRCMF_SCANTYPE_PASSIVE;
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}
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/* Adding mask to channel numbers */
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params_le->channel_num =
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@ -3162,6 +3151,7 @@ brcmf_cfg80211_escan_handler(struct brcmf_if *ifp,
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struct brcmf_cfg80211_info *cfg = ifp->drvr->config;
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s32 status;
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struct brcmf_escan_result_le *escan_result_le;
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u32 escan_buflen;
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struct brcmf_bss_info_le *bss_info_le;
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struct brcmf_bss_info_le *bss = NULL;
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u32 bi_length;
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@ -3181,11 +3171,23 @@ brcmf_cfg80211_escan_handler(struct brcmf_if *ifp,
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if (status == BRCMF_E_STATUS_PARTIAL) {
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brcmf_dbg(SCAN, "ESCAN Partial result\n");
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if (e->datalen < sizeof(*escan_result_le)) {
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brcmf_err("invalid event data length\n");
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goto exit;
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}
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escan_result_le = (struct brcmf_escan_result_le *) data;
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if (!escan_result_le) {
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brcmf_err("Invalid escan result (NULL pointer)\n");
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goto exit;
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}
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escan_buflen = le32_to_cpu(escan_result_le->buflen);
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if (escan_buflen > BRCMF_ESCAN_BUF_SIZE ||
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escan_buflen > e->datalen ||
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escan_buflen < sizeof(*escan_result_le)) {
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brcmf_err("Invalid escan buffer length: %d\n",
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escan_buflen);
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goto exit;
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}
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if (le16_to_cpu(escan_result_le->bss_count) != 1) {
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brcmf_err("Invalid bss_count %d: ignoring\n",
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escan_result_le->bss_count);
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@ -3202,9 +3204,8 @@ brcmf_cfg80211_escan_handler(struct brcmf_if *ifp,
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}
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bi_length = le32_to_cpu(bss_info_le->length);
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if (bi_length != (le32_to_cpu(escan_result_le->buflen) -
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WL_ESCAN_RESULTS_FIXED_SIZE)) {
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brcmf_err("Invalid bss_info length %d: ignoring\n",
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if (bi_length != escan_buflen - WL_ESCAN_RESULTS_FIXED_SIZE) {
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brcmf_err("Ignoring invalid bss_info length: %d\n",
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bi_length);
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goto exit;
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}
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@ -424,7 +424,8 @@ void brcmf_fweh_process_event(struct brcmf_pub *drvr,
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if (code != BRCMF_E_IF && !fweh->evt_handler[code])
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return;
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if (datalen > BRCMF_DCMD_MAXLEN)
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if (datalen > BRCMF_DCMD_MAXLEN ||
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datalen + sizeof(*event_packet) > packet_len)
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return;
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if (in_interrupt())
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@ -45,6 +45,11 @@
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#define BRCMF_SCAN_PARAMS_COUNT_MASK 0x0000ffff
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#define BRCMF_SCAN_PARAMS_NSSID_SHIFT 16
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/* scan type definitions */
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#define BRCMF_SCANTYPE_DEFAULT 0xFF
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#define BRCMF_SCANTYPE_ACTIVE 0
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#define BRCMF_SCANTYPE_PASSIVE 1
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#define BRCMF_WSEC_MAX_PSK_LEN 32
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#define BRCMF_WSEC_PASSPHRASE BIT(0)
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@ -14764,8 +14764,8 @@ static void wlc_phy_ipa_restore_tx_digi_filts_nphy(struct brcms_phy *pi)
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}
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static void
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wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, u8 *events, u8 *dlys,
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u8 len)
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wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, const u8 *events,
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const u8 *dlys, u8 len)
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{
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u32 t1_offset, t2_offset;
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u8 ctr;
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@ -15240,16 +15240,16 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(struct brcms_phy *pi)
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static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)
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{
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u16 currband;
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s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 };
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s8 *lna1_gain_db = NULL;
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s8 *lna1_gain_db_2 = NULL;
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s8 *lna2_gain_db = NULL;
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s8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 };
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s8 *tia_gain_db;
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s8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 };
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s8 *tia_gainbits;
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u16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f };
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u16 *rfseq_init_gain;
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static const s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 };
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const s8 *lna1_gain_db = NULL;
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const s8 *lna1_gain_db_2 = NULL;
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const s8 *lna2_gain_db = NULL;
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static const s8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 };
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const s8 *tia_gain_db;
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static const s8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 };
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const s8 *tia_gainbits;
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static const u16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f };
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const u16 *rfseq_init_gain;
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u16 init_gaincode;
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u16 clip1hi_gaincode;
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u16 clip1md_gaincode = 0;
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@ -15310,10 +15310,9 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)
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if ((freq <= 5080) || (freq == 5825)) {
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s8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 };
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s8 lna1A_gain_db_2_rev7[] = {
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11, 17, 22, 25};
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s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };
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static const s8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 };
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static const s8 lna1A_gain_db_2_rev7[] = { 11, 17, 22, 25};
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static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };
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crsminu_th = 0x3e;
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lna1_gain_db = lna1A_gain_db_rev7;
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@ -15321,10 +15320,9 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)
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lna2_gain_db = lna2A_gain_db_rev7;
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} else if ((freq >= 5500) && (freq <= 5700)) {
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s8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 };
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s8 lna1A_gain_db_2_rev7[] = {
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12, 18, 22, 26};
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s8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 };
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static const s8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 };
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static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26};
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static const s8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 };
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crsminu_th = 0x45;
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clip1md_gaincode_B = 0x14;
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@ -15335,10 +15333,9 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)
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lna2_gain_db = lna2A_gain_db_rev7;
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} else {
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s8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 };
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s8 lna1A_gain_db_2_rev7[] = {
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12, 18, 22, 26};
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s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };
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static const s8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 };
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static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26};
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static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };
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crsminu_th = 0x41;
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lna1_gain_db = lna1A_gain_db_rev7;
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@ -15450,65 +15447,65 @@ static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi)
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NPHY_RFSEQ_CMD_CLR_HIQ_DIS,
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NPHY_RFSEQ_CMD_SET_HPF_BW
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};
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u8 rfseq_updategainu_dlys[] = { 10, 30, 1 };
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s8 lna1G_gain_db[] = { 7, 11, 16, 23 };
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s8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 };
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s8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 };
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s8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 };
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s8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 };
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s8 lna1A_gain_db[] = { 7, 11, 17, 23 };
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s8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 };
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s8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 };
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s8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 };
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s8 *lna1_gain_db = NULL;
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s8 lna2G_gain_db[] = { -5, 6, 10, 14 };
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s8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 };
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s8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 };
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s8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 };
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s8 lna2A_gain_db[] = { -6, 2, 6, 10 };
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s8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 };
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s8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 };
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s8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 };
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s8 *lna2_gain_db = NULL;
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s8 tiaG_gain_db[] = {
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static const u8 rfseq_updategainu_dlys[] = { 10, 30, 1 };
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static const s8 lna1G_gain_db[] = { 7, 11, 16, 23 };
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static const s8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 };
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static const s8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 };
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static const s8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 };
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static const s8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 };
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static const s8 lna1A_gain_db[] = { 7, 11, 17, 23 };
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static const s8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 };
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||||
static const s8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 };
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static const s8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 };
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const s8 *lna1_gain_db = NULL;
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||||
static const s8 lna2G_gain_db[] = { -5, 6, 10, 14 };
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static const s8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 };
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static const s8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 };
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static const s8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 };
|
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static const s8 lna2A_gain_db[] = { -6, 2, 6, 10 };
|
||||
static const s8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 };
|
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static const s8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 };
|
||||
static const s8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 };
|
||||
const s8 *lna2_gain_db = NULL;
|
||||
static const s8 tiaG_gain_db[] = {
|
||||
0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A };
|
||||
s8 tiaA_gain_db[] = {
|
||||
static const s8 tiaA_gain_db[] = {
|
||||
0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13 };
|
||||
s8 tiaA_gain_db_rev4[] = {
|
||||
static const s8 tiaA_gain_db_rev4[] = {
|
||||
0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d };
|
||||
s8 tiaA_gain_db_rev5[] = {
|
||||
static const s8 tiaA_gain_db_rev5[] = {
|
||||
0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d };
|
||||
s8 tiaA_gain_db_rev6[] = {
|
||||
static const s8 tiaA_gain_db_rev6[] = {
|
||||
0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d };
|
||||
s8 *tia_gain_db;
|
||||
s8 tiaG_gainbits[] = {
|
||||
const s8 *tia_gain_db;
|
||||
static const s8 tiaG_gainbits[] = {
|
||||
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 };
|
||||
s8 tiaA_gainbits[] = {
|
||||
static const s8 tiaA_gainbits[] = {
|
||||
0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06 };
|
||||
s8 tiaA_gainbits_rev4[] = {
|
||||
static const s8 tiaA_gainbits_rev4[] = {
|
||||
0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 };
|
||||
s8 tiaA_gainbits_rev5[] = {
|
||||
static const s8 tiaA_gainbits_rev5[] = {
|
||||
0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 };
|
||||
s8 tiaA_gainbits_rev6[] = {
|
||||
static const s8 tiaA_gainbits_rev6[] = {
|
||||
0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 };
|
||||
s8 *tia_gainbits;
|
||||
s8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 };
|
||||
s8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 };
|
||||
u16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f };
|
||||
u16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f };
|
||||
u16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f };
|
||||
u16 rfseqG_init_gain_rev5_elna[] = {
|
||||
const s8 *tia_gainbits;
|
||||
static const s8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 };
|
||||
static const s8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 };
|
||||
static const u16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f };
|
||||
static const u16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f };
|
||||
static const u16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f };
|
||||
static const u16 rfseqG_init_gain_rev5_elna[] = {
|
||||
0x013f, 0x013f, 0x013f, 0x013f };
|
||||
u16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f };
|
||||
u16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f };
|
||||
u16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f };
|
||||
u16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f };
|
||||
u16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f };
|
||||
u16 rfseqA_init_gain_rev4_elna[] = {
|
||||
static const u16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f };
|
||||
static const u16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f };
|
||||
static const u16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f };
|
||||
static const u16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f };
|
||||
static const u16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f };
|
||||
static const u16 rfseqA_init_gain_rev4_elna[] = {
|
||||
0x314f, 0x314f, 0x314f, 0x314f };
|
||||
u16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f };
|
||||
u16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f };
|
||||
u16 *rfseq_init_gain;
|
||||
static const u16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f };
|
||||
static const u16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f };
|
||||
const u16 *rfseq_init_gain;
|
||||
u16 initG_gaincode = 0x627e;
|
||||
u16 initG_gaincode_rev4 = 0x527e;
|
||||
u16 initG_gaincode_rev5 = 0x427e;
|
||||
@ -15538,10 +15535,10 @@ static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi)
|
||||
u16 clip1mdA_gaincode_rev6 = 0x2084;
|
||||
u16 clip1md_gaincode = 0;
|
||||
u16 clip1loG_gaincode = 0x0074;
|
||||
u16 clip1loG_gaincode_rev5[] = {
|
||||
static const u16 clip1loG_gaincode_rev5[] = {
|
||||
0x0062, 0x0064, 0x006a, 0x106a, 0x106c, 0x1074, 0x107c, 0x207c
|
||||
};
|
||||
u16 clip1loG_gaincode_rev6[] = {
|
||||
static const u16 clip1loG_gaincode_rev6[] = {
|
||||
0x106a, 0x106c, 0x1074, 0x107c, 0x007e, 0x107e, 0x207e, 0x307e
|
||||
};
|
||||
u16 clip1loG_gaincode_rev6_224B0 = 0x1074;
|
||||
@ -16066,7 +16063,7 @@ static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi)
|
||||
|
||||
static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
||||
{
|
||||
u8 rfseq_rx2tx_events[] = {
|
||||
static const u8 rfseq_rx2tx_events[] = {
|
||||
NPHY_RFSEQ_CMD_NOP,
|
||||
NPHY_RFSEQ_CMD_RXG_FBW,
|
||||
NPHY_RFSEQ_CMD_TR_SWITCH,
|
||||
@ -16076,7 +16073,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
||||
NPHY_RFSEQ_CMD_EXT_PA
|
||||
};
|
||||
u8 rfseq_rx2tx_dlys[] = { 8, 6, 6, 2, 4, 60, 1 };
|
||||
u8 rfseq_tx2rx_events[] = {
|
||||
static const u8 rfseq_tx2rx_events[] = {
|
||||
NPHY_RFSEQ_CMD_NOP,
|
||||
NPHY_RFSEQ_CMD_EXT_PA,
|
||||
NPHY_RFSEQ_CMD_TX_GAIN,
|
||||
@ -16085,8 +16082,8 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
||||
NPHY_RFSEQ_CMD_RXG_FBW,
|
||||
NPHY_RFSEQ_CMD_CLR_HIQ_DIS
|
||||
};
|
||||
u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 };
|
||||
u8 rfseq_tx2rx_events_rev3[] = {
|
||||
static const u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 };
|
||||
static const u8 rfseq_tx2rx_events_rev3[] = {
|
||||
NPHY_REV3_RFSEQ_CMD_EXT_PA,
|
||||
NPHY_REV3_RFSEQ_CMD_INT_PA_PU,
|
||||
NPHY_REV3_RFSEQ_CMD_TX_GAIN,
|
||||
@ -16096,7 +16093,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
||||
NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS,
|
||||
NPHY_REV3_RFSEQ_CMD_END
|
||||
};
|
||||
u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 };
|
||||
static const u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 };
|
||||
u8 rfseq_rx2tx_events_rev3[] = {
|
||||
NPHY_REV3_RFSEQ_CMD_NOP,
|
||||
NPHY_REV3_RFSEQ_CMD_RXG_FBW,
|
||||
@ -16110,7 +16107,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
||||
};
|
||||
u8 rfseq_rx2tx_dlys_rev3[] = { 8, 6, 6, 4, 4, 18, 42, 1, 1 };
|
||||
|
||||
u8 rfseq_rx2tx_events_rev3_ipa[] = {
|
||||
static const u8 rfseq_rx2tx_events_rev3_ipa[] = {
|
||||
NPHY_REV3_RFSEQ_CMD_NOP,
|
||||
NPHY_REV3_RFSEQ_CMD_RXG_FBW,
|
||||
NPHY_REV3_RFSEQ_CMD_TR_SWITCH,
|
||||
@ -16121,15 +16118,15 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
||||
NPHY_REV3_RFSEQ_CMD_INT_PA_PU,
|
||||
NPHY_REV3_RFSEQ_CMD_END
|
||||
};
|
||||
u8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 };
|
||||
u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f };
|
||||
static const u8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 };
|
||||
static const u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f };
|
||||
|
||||
s16 alpha0, alpha1, alpha2;
|
||||
s16 beta0, beta1, beta2;
|
||||
u32 leg_data_weights, ht_data_weights, nss1_data_weights,
|
||||
stbc_data_weights;
|
||||
u8 chan_freq_range = 0;
|
||||
u16 dac_control = 0x0002;
|
||||
static const u16 dac_control = 0x0002;
|
||||
u16 aux_adc_vmid_rev7_core0[] = { 0x8e, 0x96, 0x96, 0x96 };
|
||||
u16 aux_adc_vmid_rev7_core1[] = { 0x8f, 0x9f, 0x9f, 0x96 };
|
||||
u16 aux_adc_vmid_rev4[] = { 0xa2, 0xb4, 0xb4, 0x89 };
|
||||
@ -16139,8 +16136,8 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
||||
u16 aux_adc_gain_rev4[] = { 0x02, 0x02, 0x02, 0x00 };
|
||||
u16 aux_adc_gain_rev3[] = { 0x02, 0x02, 0x02, 0x00 };
|
||||
u16 *aux_adc_gain;
|
||||
u16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 };
|
||||
u16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 };
|
||||
static const u16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 };
|
||||
static const u16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 };
|
||||
s32 min_nvar_val = 0x18d;
|
||||
s32 min_nvar_offset_6mbps = 20;
|
||||
u8 pdetrange;
|
||||
@ -16151,9 +16148,9 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
||||
u16 rfseq_rx2tx_lpf_h_hpc_rev7 = 0x77;
|
||||
u16 rfseq_tx2rx_lpf_h_hpc_rev7 = 0x77;
|
||||
u16 rfseq_pktgn_lpf_h_hpc_rev7 = 0x77;
|
||||
u16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 };
|
||||
u16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };
|
||||
u16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };
|
||||
static const u16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 };
|
||||
static const u16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };
|
||||
static const u16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };
|
||||
u16 ipalvlshift_3p3_war_en = 0;
|
||||
u16 rccal_bcap_val, rccal_scap_val;
|
||||
u16 rccal_tx20_11b_bcap = 0;
|
||||
@ -24291,13 +24288,13 @@ static void wlc_phy_update_txcal_ladder_nphy(struct brcms_phy *pi, u16 core)
|
||||
u16 bbmult;
|
||||
u16 tblentry;
|
||||
|
||||
struct nphy_txiqcal_ladder ladder_lo[] = {
|
||||
static const struct nphy_txiqcal_ladder ladder_lo[] = {
|
||||
{3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0},
|
||||
{25, 0}, {25, 1}, {25, 2}, {25, 3}, {25, 4}, {25, 5},
|
||||
{25, 6}, {25, 7}, {35, 7}, {50, 7}, {71, 7}, {100, 7}
|
||||
};
|
||||
|
||||
struct nphy_txiqcal_ladder ladder_iq[] = {
|
||||
static const struct nphy_txiqcal_ladder ladder_iq[] = {
|
||||
{3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0},
|
||||
{25, 0}, {35, 0}, {50, 0}, {71, 0}, {100, 0}, {100, 1},
|
||||
{100, 2}, {100, 3}, {100, 4}, {100, 5}, {100, 6}, {100, 7}
|
||||
@ -25773,67 +25770,67 @@ wlc_phy_cal_txiqlo_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain,
|
||||
u16 cal_gain[2];
|
||||
struct nphy_iqcal_params cal_params[2];
|
||||
u32 tbl_len;
|
||||
void *tbl_ptr;
|
||||
const void *tbl_ptr;
|
||||
bool ladder_updated[2];
|
||||
u8 mphase_cal_lastphase = 0;
|
||||
int bcmerror = 0;
|
||||
bool phyhang_avoid_state = false;
|
||||
|
||||
u16 tbl_tx_iqlo_cal_loft_ladder_20[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_loft_ladder_20[] = {
|
||||
0x0300, 0x0500, 0x0700, 0x0900, 0x0d00, 0x1100, 0x1900, 0x1901,
|
||||
0x1902,
|
||||
0x1903, 0x1904, 0x1905, 0x1906, 0x1907, 0x2407, 0x3207, 0x4607,
|
||||
0x6407
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = {
|
||||
0x0200, 0x0300, 0x0600, 0x0900, 0x0d00, 0x1100, 0x1900, 0x2400,
|
||||
0x3200,
|
||||
0x4600, 0x6400, 0x6401, 0x6402, 0x6403, 0x6404, 0x6405, 0x6406,
|
||||
0x6407
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_loft_ladder_40[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_loft_ladder_40[] = {
|
||||
0x0200, 0x0300, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1201,
|
||||
0x1202,
|
||||
0x1203, 0x1204, 0x1205, 0x1206, 0x1207, 0x1907, 0x2307, 0x3207,
|
||||
0x4707
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = {
|
||||
0x0100, 0x0200, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1900,
|
||||
0x2300,
|
||||
0x3200, 0x4700, 0x4701, 0x4702, 0x4703, 0x4704, 0x4705, 0x4706,
|
||||
0x4707
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_startcoefs[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_startcoefs[] = {
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_cmds_fullcal[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_cmds_fullcal[] = {
|
||||
0x8123, 0x8264, 0x8086, 0x8245, 0x8056,
|
||||
0x9123, 0x9264, 0x9086, 0x9245, 0x9056
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_cmds_recal[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_cmds_recal[] = {
|
||||
0x8101, 0x8253, 0x8053, 0x8234, 0x8034,
|
||||
0x9101, 0x9253, 0x9053, 0x9234, 0x9034
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = {
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = {
|
||||
0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234,
|
||||
0x9434, 0x9334, 0x9084, 0x9267, 0x9056, 0x9234
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = {
|
||||
0x8423, 0x8323, 0x8073, 0x8256, 0x8045, 0x8223,
|
||||
0x9423, 0x9323, 0x9073, 0x9256, 0x9045, 0x9223
|
||||
};
|
||||
|
@ -309,6 +309,7 @@ const struct iwl_cfg iwl3168_2ac_cfg = {
|
||||
.nvm_calib_ver = IWL3168_TX_POWER_VERSION,
|
||||
.pwr_tx_backoffs = iwl7265_pwr_tx_backoffs,
|
||||
.dccm_len = IWL7265_DCCM_LEN,
|
||||
.nvm_type = IWL_NVM_SDP,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl7265_2ac_cfg = {
|
||||
|
@ -164,7 +164,7 @@ static const struct iwl_tt_params iwl8000_tt_params = {
|
||||
.default_nvm_file_C_step = DEFAULT_NVM_FILE_FAMILY_8000C, \
|
||||
.thermal_params = &iwl8000_tt_params, \
|
||||
.apmg_not_supported = true, \
|
||||
.ext_nvm = true, \
|
||||
.nvm_type = IWL_NVM_EXT, \
|
||||
.dbgc_supported = true
|
||||
|
||||
#define IWL_DEVICE_8000 \
|
||||
|
@ -148,7 +148,7 @@ static const struct iwl_tt_params iwl9000_tt_params = {
|
||||
.vht_mu_mimo_supported = true, \
|
||||
.mac_addr_from_csr = true, \
|
||||
.rf_id = true, \
|
||||
.ext_nvm = true, \
|
||||
.nvm_type = IWL_NVM_EXT, \
|
||||
.dbgc_supported = true
|
||||
|
||||
const struct iwl_cfg iwl9160_2ac_cfg = {
|
||||
|
@ -133,7 +133,7 @@ static const struct iwl_ht_params iwl_a000_ht_params = {
|
||||
.use_tfh = true, \
|
||||
.rf_id = true, \
|
||||
.gen2 = true, \
|
||||
.ext_nvm = true, \
|
||||
.nvm_type = IWL_NVM_EXT, \
|
||||
.dbgc_supported = true, \
|
||||
.tx_cmd_queue_size = 32
|
||||
|
||||
|
@ -108,6 +108,7 @@ enum iwl_nvm_access_target {
|
||||
* @NVM_SECTION_TYPE_REGULATORY: regulatory section
|
||||
* @NVM_SECTION_TYPE_CALIBRATION: calibration section
|
||||
* @NVM_SECTION_TYPE_PRODUCTION: production section
|
||||
* @NVM_SECTION_TYPE_REGULATORY_SDP: regulatory section used by 3168 series
|
||||
* @NVM_SECTION_TYPE_MAC_OVERRIDE: MAC override section
|
||||
* @NVM_SECTION_TYPE_PHY_SKU: PHY SKU section
|
||||
* @NVM_MAX_NUM_SECTIONS: number of sections
|
||||
@ -117,6 +118,7 @@ enum iwl_nvm_section_type {
|
||||
NVM_SECTION_TYPE_REGULATORY = 3,
|
||||
NVM_SECTION_TYPE_CALIBRATION = 4,
|
||||
NVM_SECTION_TYPE_PRODUCTION = 5,
|
||||
NVM_SECTION_TYPE_REGULATORY_SDP = 8,
|
||||
NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
|
||||
NVM_SECTION_TYPE_PHY_SKU = 12,
|
||||
NVM_MAX_NUM_SECTIONS = 13,
|
||||
|
@ -1101,7 +1101,7 @@ void iwl_fw_error_dump_wk(struct work_struct *work)
|
||||
|
||||
if (fwrt->trans->cfg->device_family == IWL_DEVICE_FAMILY_7000) {
|
||||
/* stop recording */
|
||||
iwl_set_bits_prph(fwrt->trans, MON_BUFF_SAMPLE_CTL, 0x100);
|
||||
iwl_fw_dbg_stop_recording(fwrt);
|
||||
|
||||
iwl_fw_error_dump(fwrt);
|
||||
|
||||
@ -1119,10 +1119,7 @@ void iwl_fw_error_dump_wk(struct work_struct *work)
|
||||
u32 in_sample = iwl_read_prph(fwrt->trans, DBGC_IN_SAMPLE);
|
||||
u32 out_ctrl = iwl_read_prph(fwrt->trans, DBGC_OUT_CTRL);
|
||||
|
||||
/* stop recording */
|
||||
iwl_write_prph(fwrt->trans, DBGC_IN_SAMPLE, 0);
|
||||
udelay(100);
|
||||
iwl_write_prph(fwrt->trans, DBGC_OUT_CTRL, 0);
|
||||
iwl_fw_dbg_stop_recording(fwrt);
|
||||
/* wait before we collect the data till the DBGC stop */
|
||||
udelay(500);
|
||||
|
||||
|
@ -68,6 +68,8 @@
|
||||
#include <linux/workqueue.h>
|
||||
#include <net/cfg80211.h>
|
||||
#include "runtime.h"
|
||||
#include "iwl-prph.h"
|
||||
#include "iwl-io.h"
|
||||
#include "file.h"
|
||||
#include "error-dump.h"
|
||||
|
||||
@ -194,8 +196,21 @@ _iwl_fw_dbg_trigger_simple_stop(struct iwl_fw_runtime *fwrt,
|
||||
iwl_fw_dbg_get_trigger((fwrt)->fw,\
|
||||
(trig)))
|
||||
|
||||
static inline void iwl_fw_dbg_stop_recording(struct iwl_fw_runtime *fwrt)
|
||||
{
|
||||
if (fwrt->trans->cfg->device_family == IWL_DEVICE_FAMILY_7000) {
|
||||
iwl_set_bits_prph(fwrt->trans, MON_BUFF_SAMPLE_CTL, 0x100);
|
||||
} else {
|
||||
iwl_write_prph(fwrt->trans, DBGC_IN_SAMPLE, 0);
|
||||
udelay(100);
|
||||
iwl_write_prph(fwrt->trans, DBGC_OUT_CTRL, 0);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void iwl_fw_dump_conf_clear(struct iwl_fw_runtime *fwrt)
|
||||
{
|
||||
iwl_fw_dbg_stop_recording(fwrt);
|
||||
|
||||
fwrt->dump.conf = FW_DBG_INVALID;
|
||||
}
|
||||
|
||||
|
@ -108,6 +108,18 @@ enum iwl_led_mode {
|
||||
IWL_LED_DISABLE,
|
||||
};
|
||||
|
||||
/**
|
||||
* enum iwl_nvm_type - nvm formats
|
||||
* @IWL_NVM: the regular format
|
||||
* @IWL_NVM_EXT: extended NVM format
|
||||
* @IWL_NVM_SDP: NVM format used by 3168 series
|
||||
*/
|
||||
enum iwl_nvm_type {
|
||||
IWL_NVM,
|
||||
IWL_NVM_EXT,
|
||||
IWL_NVM_SDP,
|
||||
};
|
||||
|
||||
/*
|
||||
* This is the threshold value of plcp error rate per 100mSecs. It is
|
||||
* used to set and check for the validity of plcp_delta.
|
||||
@ -320,7 +332,7 @@ struct iwl_pwr_tx_backoff {
|
||||
* @integrated: discrete or integrated
|
||||
* @gen2: a000 and on transport operation
|
||||
* @cdb: CDB support
|
||||
* @ext_nvm: extended NVM format
|
||||
* @nvm_type: see &enum iwl_nvm_type
|
||||
* @tx_cmd_queue_size: size of the cmd queue. If zero, use the same value as
|
||||
* the regular queues
|
||||
*
|
||||
@ -344,6 +356,7 @@ struct iwl_cfg {
|
||||
const struct iwl_tt_params *thermal_params;
|
||||
enum iwl_device_family device_family;
|
||||
enum iwl_led_mode led_mode;
|
||||
enum iwl_nvm_type nvm_type;
|
||||
u32 max_data_size;
|
||||
u32 max_inst_size;
|
||||
netdev_features_t features;
|
||||
@ -371,7 +384,6 @@ struct iwl_cfg {
|
||||
use_tfh:1,
|
||||
gen2:1,
|
||||
cdb:1,
|
||||
ext_nvm:1,
|
||||
dbgc_supported:1;
|
||||
u16 tx_cmd_queue_size;
|
||||
u8 valid_tx_ant;
|
||||
|
@ -78,7 +78,7 @@
|
||||
#include "fw/acpi.h"
|
||||
|
||||
/* NVM offsets (in words) definitions */
|
||||
enum wkp_nvm_offsets {
|
||||
enum nvm_offsets {
|
||||
/* NVM HW-Section offset (in words) definitions */
|
||||
SUBSYSTEM_ID = 0x0A,
|
||||
HW_ADDR = 0x15,
|
||||
@ -90,6 +90,13 @@ enum wkp_nvm_offsets {
|
||||
SKU = 2,
|
||||
N_HW_ADDRS = 3,
|
||||
NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
|
||||
|
||||
/* NVM calibration section offset (in words) definitions */
|
||||
NVM_CALIB_SECTION = 0x2B8,
|
||||
XTAL_CALIB = 0x316 - NVM_CALIB_SECTION,
|
||||
|
||||
/* NVM REGULATORY -Section offset (in words) definitions */
|
||||
NVM_CHANNELS_SDP = 0,
|
||||
};
|
||||
|
||||
enum ext_nvm_offsets {
|
||||
@ -203,8 +210,36 @@ enum iwl_nvm_channel_flags {
|
||||
NVM_CHANNEL_DC_HIGH = BIT(12),
|
||||
};
|
||||
|
||||
static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level,
|
||||
int chan, u16 flags)
|
||||
{
|
||||
#define CHECK_AND_PRINT_I(x) \
|
||||
((ch_flags & NVM_CHANNEL_##x) ? # x " " : "")
|
||||
((flags & NVM_CHANNEL_##x) ? " " #x : "")
|
||||
|
||||
if (!(flags & NVM_CHANNEL_VALID)) {
|
||||
IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n",
|
||||
chan, flags);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Note: already can print up to 101 characters, 110 is the limit! */
|
||||
IWL_DEBUG_DEV(dev, level,
|
||||
"Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s\n",
|
||||
chan, flags,
|
||||
CHECK_AND_PRINT_I(VALID),
|
||||
CHECK_AND_PRINT_I(IBSS),
|
||||
CHECK_AND_PRINT_I(ACTIVE),
|
||||
CHECK_AND_PRINT_I(RADAR),
|
||||
CHECK_AND_PRINT_I(INDOOR_ONLY),
|
||||
CHECK_AND_PRINT_I(GO_CONCURRENT),
|
||||
CHECK_AND_PRINT_I(UNIFORM),
|
||||
CHECK_AND_PRINT_I(20MHZ),
|
||||
CHECK_AND_PRINT_I(40MHZ),
|
||||
CHECK_AND_PRINT_I(80MHZ),
|
||||
CHECK_AND_PRINT_I(160MHZ),
|
||||
CHECK_AND_PRINT_I(DC_HIGH));
|
||||
#undef CHECK_AND_PRINT_I
|
||||
}
|
||||
|
||||
static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
|
||||
u16 nvm_flags, const struct iwl_cfg *cfg)
|
||||
@ -212,7 +247,7 @@ static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
|
||||
u32 flags = IEEE80211_CHAN_NO_HT40;
|
||||
u32 last_5ghz_ht = LAST_5GHZ_HT;
|
||||
|
||||
if (cfg->ext_nvm)
|
||||
if (cfg->nvm_type == IWL_NVM_EXT)
|
||||
last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
|
||||
|
||||
if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) {
|
||||
@ -265,7 +300,7 @@ static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
|
||||
int num_of_ch, num_2ghz_channels;
|
||||
const u8 *nvm_chan;
|
||||
|
||||
if (!cfg->ext_nvm) {
|
||||
if (cfg->nvm_type != IWL_NVM_EXT) {
|
||||
num_of_ch = IWL_NUM_CHANNELS;
|
||||
nvm_chan = &iwl_nvm_channels[0];
|
||||
num_2ghz_channels = NUM_2GHZ_CHANNELS;
|
||||
@ -299,12 +334,8 @@ static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
|
||||
* supported, hence we still want to add them to
|
||||
* the list of supported channels to cfg80211.
|
||||
*/
|
||||
IWL_DEBUG_EEPROM(dev,
|
||||
"Ch. %d Flags %x [%sGHz] - No traffic\n",
|
||||
nvm_chan[ch_idx],
|
||||
ch_flags,
|
||||
(ch_idx >= num_2ghz_channels) ?
|
||||
"5.2" : "2.4");
|
||||
iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
|
||||
nvm_chan[ch_idx], ch_flags);
|
||||
continue;
|
||||
}
|
||||
|
||||
@ -334,27 +365,10 @@ static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
|
||||
else
|
||||
channel->flags = 0;
|
||||
|
||||
IWL_DEBUG_EEPROM(dev,
|
||||
"Ch. %d [%sGHz] flags 0x%x %s%s%s%s%s%s%s%s%s%s%s%s(%ddBm): Ad-Hoc %ssupported\n",
|
||||
channel->hw_value,
|
||||
is_5ghz ? "5.2" : "2.4",
|
||||
ch_flags,
|
||||
CHECK_AND_PRINT_I(VALID),
|
||||
CHECK_AND_PRINT_I(IBSS),
|
||||
CHECK_AND_PRINT_I(ACTIVE),
|
||||
CHECK_AND_PRINT_I(RADAR),
|
||||
CHECK_AND_PRINT_I(INDOOR_ONLY),
|
||||
CHECK_AND_PRINT_I(GO_CONCURRENT),
|
||||
CHECK_AND_PRINT_I(UNIFORM),
|
||||
CHECK_AND_PRINT_I(20MHZ),
|
||||
CHECK_AND_PRINT_I(40MHZ),
|
||||
CHECK_AND_PRINT_I(80MHZ),
|
||||
CHECK_AND_PRINT_I(160MHZ),
|
||||
CHECK_AND_PRINT_I(DC_HIGH),
|
||||
channel->max_power,
|
||||
((ch_flags & NVM_CHANNEL_IBSS) &&
|
||||
!(ch_flags & NVM_CHANNEL_RADAR))
|
||||
? "" : "not ");
|
||||
iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
|
||||
channel->hw_value, ch_flags);
|
||||
IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n",
|
||||
channel->hw_value, channel->max_power);
|
||||
}
|
||||
|
||||
return n_channels;
|
||||
@ -481,7 +495,7 @@ IWL_EXPORT_SYMBOL(iwl_init_sbands);
|
||||
static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
|
||||
const __le16 *phy_sku)
|
||||
{
|
||||
if (!cfg->ext_nvm)
|
||||
if (cfg->nvm_type != IWL_NVM_EXT)
|
||||
return le16_to_cpup(nvm_sw + SKU);
|
||||
|
||||
return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000));
|
||||
@ -489,7 +503,7 @@ static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
|
||||
|
||||
static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
|
||||
{
|
||||
if (!cfg->ext_nvm)
|
||||
if (cfg->nvm_type != IWL_NVM_EXT)
|
||||
return le16_to_cpup(nvm_sw + NVM_VERSION);
|
||||
else
|
||||
return le32_to_cpup((__le32 *)(nvm_sw +
|
||||
@ -499,7 +513,7 @@ static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
|
||||
static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
|
||||
const __le16 *phy_sku)
|
||||
{
|
||||
if (!cfg->ext_nvm)
|
||||
if (cfg->nvm_type != IWL_NVM_EXT)
|
||||
return le16_to_cpup(nvm_sw + RADIO_CFG);
|
||||
|
||||
return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM));
|
||||
@ -510,7 +524,7 @@ static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
|
||||
{
|
||||
int n_hw_addr;
|
||||
|
||||
if (!cfg->ext_nvm)
|
||||
if (cfg->nvm_type != IWL_NVM_EXT)
|
||||
return le16_to_cpup(nvm_sw + N_HW_ADDRS);
|
||||
|
||||
n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
|
||||
@ -522,7 +536,7 @@ static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
|
||||
struct iwl_nvm_data *data,
|
||||
u32 radio_cfg)
|
||||
{
|
||||
if (!cfg->ext_nvm) {
|
||||
if (cfg->nvm_type != IWL_NVM_EXT) {
|
||||
data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
|
||||
data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
|
||||
data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
|
||||
@ -631,7 +645,7 @@ static int iwl_set_hw_address(struct iwl_trans *trans,
|
||||
{
|
||||
if (cfg->mac_addr_from_csr) {
|
||||
iwl_set_hw_address_from_csr(trans, data);
|
||||
} else if (!cfg->ext_nvm) {
|
||||
} else if (cfg->nvm_type != IWL_NVM_EXT) {
|
||||
const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR);
|
||||
|
||||
/* The byte order is little endian 16 bit, meaning 214365 */
|
||||
@ -703,7 +717,7 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
|
||||
u16 lar_config;
|
||||
const __le16 *ch_section;
|
||||
|
||||
if (!cfg->ext_nvm)
|
||||
if (cfg->nvm_type != IWL_NVM_EXT)
|
||||
data = kzalloc(sizeof(*data) +
|
||||
sizeof(struct ieee80211_channel) *
|
||||
IWL_NUM_CHANNELS,
|
||||
@ -737,7 +751,7 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
|
||||
|
||||
data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
|
||||
|
||||
if (!cfg->ext_nvm) {
|
||||
if (cfg->nvm_type != IWL_NVM_EXT) {
|
||||
/* Checking for required sections */
|
||||
if (!nvm_calib) {
|
||||
IWL_ERR(trans,
|
||||
@ -745,8 +759,15 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
|
||||
kfree(data);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
ch_section = cfg->nvm_type == IWL_NVM_SDP ?
|
||||
®ulatory[NVM_CHANNELS_SDP] :
|
||||
&nvm_sw[NVM_CHANNELS];
|
||||
|
||||
/* in family 8000 Xtal calibration values moved to OTP */
|
||||
data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
|
||||
data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
|
||||
lar_enabled = true;
|
||||
ch_section = &nvm_sw[NVM_CHANNELS];
|
||||
} else {
|
||||
u16 lar_offset = data->nvm_version < 0xE39 ?
|
||||
NVM_LAR_OFFSET_OLD :
|
||||
@ -780,7 +801,7 @@ static u32 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan,
|
||||
u32 flags = NL80211_RRF_NO_HT40;
|
||||
u32 last_5ghz_ht = LAST_5GHZ_HT;
|
||||
|
||||
if (cfg->ext_nvm)
|
||||
if (cfg->nvm_type == IWL_NVM_EXT)
|
||||
last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
|
||||
|
||||
if (ch_idx < NUM_2GHZ_CHANNELS &&
|
||||
@ -828,7 +849,7 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
|
||||
int ch_idx;
|
||||
u16 ch_flags;
|
||||
u32 reg_rule_flags, prev_reg_rule_flags = 0;
|
||||
const u8 *nvm_chan = cfg->ext_nvm ?
|
||||
const u8 *nvm_chan = cfg->nvm_type == IWL_NVM_EXT ?
|
||||
iwl_ext_nvm_channels : iwl_nvm_channels;
|
||||
struct ieee80211_regdomain *regd;
|
||||
int size_of_regd;
|
||||
@ -837,7 +858,7 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
|
||||
int center_freq, prev_center_freq = 0;
|
||||
int valid_rules = 0;
|
||||
bool new_rule;
|
||||
int max_num_ch = cfg->ext_nvm ?
|
||||
int max_num_ch = cfg->nvm_type == IWL_NVM_EXT ?
|
||||
IWL_NUM_CHANNELS_EXT : IWL_NUM_CHANNELS;
|
||||
|
||||
if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
|
||||
@ -867,12 +888,8 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
|
||||
new_rule = false;
|
||||
|
||||
if (!(ch_flags & NVM_CHANNEL_VALID)) {
|
||||
IWL_DEBUG_DEV(dev, IWL_DL_LAR,
|
||||
"Ch. %d Flags %x [%sGHz] - No traffic\n",
|
||||
nvm_chan[ch_idx],
|
||||
ch_flags,
|
||||
(ch_idx >= NUM_2GHZ_CHANNELS) ?
|
||||
"5.2" : "2.4");
|
||||
iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
|
||||
nvm_chan[ch_idx], ch_flags);
|
||||
continue;
|
||||
}
|
||||
|
||||
@ -908,31 +925,8 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
|
||||
prev_center_freq = center_freq;
|
||||
prev_reg_rule_flags = reg_rule_flags;
|
||||
|
||||
IWL_DEBUG_DEV(dev, IWL_DL_LAR,
|
||||
"Ch. %d [%sGHz] %s%s%s%s%s%s%s%s%s%s%s%s(0x%02x)\n",
|
||||
center_freq,
|
||||
band == NL80211_BAND_5GHZ ? "5.2" : "2.4",
|
||||
CHECK_AND_PRINT_I(VALID),
|
||||
CHECK_AND_PRINT_I(IBSS),
|
||||
CHECK_AND_PRINT_I(ACTIVE),
|
||||
CHECK_AND_PRINT_I(RADAR),
|
||||
CHECK_AND_PRINT_I(INDOOR_ONLY),
|
||||
CHECK_AND_PRINT_I(GO_CONCURRENT),
|
||||
CHECK_AND_PRINT_I(UNIFORM),
|
||||
CHECK_AND_PRINT_I(20MHZ),
|
||||
CHECK_AND_PRINT_I(40MHZ),
|
||||
CHECK_AND_PRINT_I(80MHZ),
|
||||
CHECK_AND_PRINT_I(160MHZ),
|
||||
CHECK_AND_PRINT_I(DC_HIGH),
|
||||
ch_flags);
|
||||
IWL_DEBUG_DEV(dev, IWL_DL_LAR,
|
||||
"Ch. %d [%sGHz] reg_flags 0x%x: %s\n",
|
||||
center_freq,
|
||||
band == NL80211_BAND_5GHZ ? "5.2" : "2.4",
|
||||
reg_rule_flags,
|
||||
((ch_flags & NVM_CHANNEL_ACTIVE) &&
|
||||
!(ch_flags & NVM_CHANNEL_RADAR))
|
||||
? "Ad-Hoc" : "");
|
||||
iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
|
||||
nvm_chan[ch_idx], ch_flags);
|
||||
}
|
||||
|
||||
regd->n_reg_rules = valid_rules;
|
||||
|
@ -2171,7 +2171,7 @@ static int __iwl_mvm_resume(struct iwl_mvm *mvm, bool test)
|
||||
* 1. We are not using a unified image
|
||||
* 2. We are using a unified image but had an error while exiting D3
|
||||
*/
|
||||
set_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status);
|
||||
set_bit(IWL_MVM_STATUS_HW_RESTART_REQUESTED, &mvm->status);
|
||||
set_bit(IWL_MVM_STATUS_D3_RECONFIG, &mvm->status);
|
||||
/*
|
||||
* When switching images we return 1, which causes mac80211
|
||||
|
@ -1077,6 +1077,7 @@ static void iwl_mvm_restart_cleanup(struct iwl_mvm *mvm)
|
||||
mvm->vif_count = 0;
|
||||
mvm->rx_ba_sessions = 0;
|
||||
mvm->fwrt.dump.conf = FW_DBG_INVALID;
|
||||
mvm->monitor_on = false;
|
||||
|
||||
/* keep statistics ticking */
|
||||
iwl_mvm_accu_radio_stats(mvm);
|
||||
@ -1437,6 +1438,9 @@ static int iwl_mvm_mac_add_interface(struct ieee80211_hw *hw,
|
||||
mvm->p2p_device_vif = vif;
|
||||
}
|
||||
|
||||
if (vif->type == NL80211_IFTYPE_MONITOR)
|
||||
mvm->monitor_on = true;
|
||||
|
||||
iwl_mvm_vif_dbgfs_register(mvm, vif);
|
||||
goto out_unlock;
|
||||
|
||||
@ -1526,6 +1530,9 @@ static void iwl_mvm_mac_remove_interface(struct ieee80211_hw *hw,
|
||||
iwl_mvm_power_update_mac(mvm);
|
||||
iwl_mvm_mac_ctxt_remove(mvm, vif);
|
||||
|
||||
if (vif->type == NL80211_IFTYPE_MONITOR)
|
||||
mvm->monitor_on = false;
|
||||
|
||||
out_release:
|
||||
mutex_unlock(&mvm->mutex);
|
||||
}
|
||||
@ -1546,6 +1553,11 @@ static void iwl_mvm_mc_iface_iterator(void *_data, u8 *mac,
|
||||
struct iwl_mvm_mc_iter_data *data = _data;
|
||||
struct iwl_mvm *mvm = data->mvm;
|
||||
struct iwl_mcast_filter_cmd *cmd = mvm->mcast_filter_cmd;
|
||||
struct iwl_host_cmd hcmd = {
|
||||
.id = MCAST_FILTER_CMD,
|
||||
.flags = CMD_ASYNC,
|
||||
.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
|
||||
};
|
||||
int ret, len;
|
||||
|
||||
/* if we don't have free ports, mcast frames will be dropped */
|
||||
@ -1560,7 +1572,10 @@ static void iwl_mvm_mc_iface_iterator(void *_data, u8 *mac,
|
||||
memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
|
||||
len = roundup(sizeof(*cmd) + cmd->count * ETH_ALEN, 4);
|
||||
|
||||
ret = iwl_mvm_send_cmd_pdu(mvm, MCAST_FILTER_CMD, CMD_ASYNC, len, cmd);
|
||||
hcmd.len[0] = len;
|
||||
hcmd.data[0] = cmd;
|
||||
|
||||
ret = iwl_mvm_send_cmd(mvm, &hcmd);
|
||||
if (ret)
|
||||
IWL_ERR(mvm, "mcast filter cmd error. ret=%d\n", ret);
|
||||
}
|
||||
@ -1635,6 +1650,12 @@ static void iwl_mvm_configure_filter(struct ieee80211_hw *hw,
|
||||
if (!cmd)
|
||||
goto out;
|
||||
|
||||
if (changed_flags & FIF_ALLMULTI)
|
||||
cmd->pass_all = !!(*total_flags & FIF_ALLMULTI);
|
||||
|
||||
if (cmd->pass_all)
|
||||
cmd->count = 0;
|
||||
|
||||
iwl_mvm_recalc_multicast(mvm);
|
||||
out:
|
||||
mutex_unlock(&mvm->mutex);
|
||||
@ -2558,7 +2579,7 @@ static void iwl_mvm_purge_deferred_tx_frames(struct iwl_mvm *mvm,
|
||||
* queues, so we should never get a second deferred
|
||||
* frame for the RA/TID.
|
||||
*/
|
||||
iwl_mvm_start_mac_queues(mvm, info->hw_queue);
|
||||
iwl_mvm_start_mac_queues(mvm, BIT(info->hw_queue));
|
||||
ieee80211_free_txskb(mvm->hw, skb);
|
||||
}
|
||||
}
|
||||
@ -3979,6 +4000,43 @@ static int iwl_mvm_post_channel_switch(struct ieee80211_hw *hw,
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void iwl_mvm_flush_no_vif(struct iwl_mvm *mvm, u32 queues, bool drop)
|
||||
{
|
||||
if (drop) {
|
||||
if (iwl_mvm_has_new_tx_api(mvm))
|
||||
/* TODO new tx api */
|
||||
WARN_ONCE(1,
|
||||
"Need to implement flush TX queue\n");
|
||||
else
|
||||
iwl_mvm_flush_tx_path(mvm,
|
||||
iwl_mvm_flushable_queues(mvm) & queues,
|
||||
0);
|
||||
} else {
|
||||
if (iwl_mvm_has_new_tx_api(mvm)) {
|
||||
struct ieee80211_sta *sta;
|
||||
int i;
|
||||
|
||||
mutex_lock(&mvm->mutex);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) {
|
||||
sta = rcu_dereference_protected(
|
||||
mvm->fw_id_to_mac_id[i],
|
||||
lockdep_is_held(&mvm->mutex));
|
||||
if (IS_ERR_OR_NULL(sta))
|
||||
continue;
|
||||
|
||||
iwl_mvm_wait_sta_queues_empty(mvm,
|
||||
iwl_mvm_sta_from_mac80211(sta));
|
||||
}
|
||||
|
||||
mutex_unlock(&mvm->mutex);
|
||||
} else {
|
||||
iwl_trans_wait_tx_queues_empty(mvm->trans,
|
||||
queues);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void iwl_mvm_mac_flush(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif, u32 queues, bool drop)
|
||||
{
|
||||
@ -3989,7 +4047,12 @@ static void iwl_mvm_mac_flush(struct ieee80211_hw *hw,
|
||||
int i;
|
||||
u32 msk = 0;
|
||||
|
||||
if (!vif || vif->type != NL80211_IFTYPE_STATION)
|
||||
if (!vif) {
|
||||
iwl_mvm_flush_no_vif(mvm, queues, drop);
|
||||
return;
|
||||
}
|
||||
|
||||
if (vif->type != NL80211_IFTYPE_STATION)
|
||||
return;
|
||||
|
||||
/* Make sure we're done with the deferred traffic before flushing */
|
||||
|
@ -1008,6 +1008,9 @@ struct iwl_mvm {
|
||||
bool drop_bcn_ap_mode;
|
||||
|
||||
struct delayed_work cs_tx_unblock_dwork;
|
||||
|
||||
/* does a monitor vif exist (only one can exist hence bool) */
|
||||
bool monitor_on;
|
||||
#ifdef CONFIG_ACPI
|
||||
struct iwl_mvm_sar_profile sar_profiles[ACPI_SAR_PROFILE_NUM];
|
||||
struct iwl_mvm_geo_profile geo_profiles[ACPI_NUM_GEO_PROFILES];
|
||||
@ -1152,7 +1155,7 @@ static inline bool iwl_mvm_is_lar_supported(struct iwl_mvm *mvm)
|
||||
* Enable LAR only if it is supported by the FW (TLV) &&
|
||||
* enabled in the NVM
|
||||
*/
|
||||
if (mvm->cfg->ext_nvm)
|
||||
if (mvm->cfg->nvm_type == IWL_NVM_EXT)
|
||||
return nvm_lar && tlv_lar;
|
||||
else
|
||||
return tlv_lar;
|
||||
|
@ -296,18 +296,24 @@ iwl_parse_nvm_sections(struct iwl_mvm *mvm)
|
||||
const __be16 *hw;
|
||||
const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku;
|
||||
bool lar_enabled;
|
||||
int regulatory_type;
|
||||
|
||||
/* Checking for required sections */
|
||||
if (!mvm->trans->cfg->ext_nvm) {
|
||||
if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT) {
|
||||
if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
|
||||
!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
|
||||
IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
|
||||
return NULL;
|
||||
}
|
||||
} else {
|
||||
if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP)
|
||||
regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP;
|
||||
else
|
||||
regulatory_type = NVM_SECTION_TYPE_REGULATORY;
|
||||
|
||||
/* SW and REGULATORY sections are mandatory */
|
||||
if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
|
||||
!mvm->nvm_sections[NVM_SECTION_TYPE_REGULATORY].data) {
|
||||
!mvm->nvm_sections[regulatory_type].data) {
|
||||
IWL_ERR(mvm,
|
||||
"Can't parse empty family 8000 OTP/NVM sections\n");
|
||||
return NULL;
|
||||
@ -331,11 +337,14 @@ iwl_parse_nvm_sections(struct iwl_mvm *mvm)
|
||||
hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data;
|
||||
sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
|
||||
calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
|
||||
regulatory = (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
|
||||
mac_override =
|
||||
(const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
|
||||
phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
|
||||
|
||||
regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ?
|
||||
(const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data :
|
||||
(const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
|
||||
|
||||
lar_enabled = !iwlwifi_mod_params.lar_disable &&
|
||||
fw_has_capa(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
|
||||
@ -395,7 +404,7 @@ int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
|
||||
IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");
|
||||
|
||||
/* Maximal size depends on NVM version */
|
||||
if (!mvm->trans->cfg->ext_nvm)
|
||||
if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT)
|
||||
max_section_size = IWL_MAX_NVM_SECTION_SIZE;
|
||||
else
|
||||
max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE;
|
||||
@ -466,7 +475,7 @@ int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
|
||||
break;
|
||||
}
|
||||
|
||||
if (!mvm->trans->cfg->ext_nvm) {
|
||||
if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT) {
|
||||
section_size =
|
||||
2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
|
||||
section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
|
||||
@ -741,7 +750,7 @@ int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
|
||||
struct ieee80211_regdomain *regd;
|
||||
char mcc[3];
|
||||
|
||||
if (mvm->cfg->ext_nvm) {
|
||||
if (mvm->cfg->nvm_type == IWL_NVM_EXT) {
|
||||
tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
|
||||
nvm_lar = mvm->nvm_data->lar_enabled;
|
||||
|
@ -661,7 +661,8 @@ static void rs_tl_turn_on_agg(struct iwl_mvm *mvm, struct iwl_mvm_sta *mvmsta,
|
||||
(lq_sta->tx_agg_tid_en & BIT(tid)) &&
|
||||
(tid_data->tx_count_last >= IWL_MVM_RS_AGG_START_THRESHOLD)) {
|
||||
IWL_DEBUG_RATE(mvm, "try to aggregate tid %d\n", tid);
|
||||
rs_tl_turn_on_agg_for_tid(mvm, lq_sta, tid, sta);
|
||||
if (rs_tl_turn_on_agg_for_tid(mvm, lq_sta, tid, sta) == 0)
|
||||
tid_data->state = IWL_AGG_QUEUED;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -244,7 +244,9 @@ static u32 iwl_mvm_set_mac80211_rx_flag(struct iwl_mvm *mvm,
|
||||
return 0;
|
||||
|
||||
default:
|
||||
IWL_ERR(mvm, "Unhandled alg: 0x%x\n", rx_pkt_status);
|
||||
/* Expected in monitor (not having the keys) */
|
||||
if (!mvm->monitor_on)
|
||||
IWL_ERR(mvm, "Unhandled alg: 0x%x\n", rx_pkt_status);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -277,7 +277,9 @@ static int iwl_mvm_rx_crypto(struct iwl_mvm *mvm, struct ieee80211_hdr *hdr,
|
||||
stats->flag |= RX_FLAG_DECRYPTED;
|
||||
return 0;
|
||||
default:
|
||||
IWL_ERR(mvm, "Unhandled alg: 0x%x\n", status);
|
||||
/* Expected in monitor (not having the keys) */
|
||||
if (!mvm->monitor_on)
|
||||
IWL_ERR(mvm, "Unhandled alg: 0x%x\n", status);
|
||||
}
|
||||
|
||||
return 0;
|
||||
@ -678,11 +680,12 @@ static bool iwl_mvm_reorder(struct iwl_mvm *mvm,
|
||||
* If there was a significant jump in the nssn - adjust.
|
||||
* If the SN is smaller than the NSSN it might need to first go into
|
||||
* the reorder buffer, in which case we just release up to it and the
|
||||
* rest of the function will take of storing it and releasing up to the
|
||||
* nssn
|
||||
* rest of the function will take care of storing it and releasing up to
|
||||
* the nssn
|
||||
*/
|
||||
if (!iwl_mvm_is_sn_less(nssn, buffer->head_sn + buffer->buf_size,
|
||||
buffer->buf_size)) {
|
||||
buffer->buf_size) ||
|
||||
!ieee80211_sn_less(sn, buffer->head_sn + buffer->buf_size)) {
|
||||
u16 min_sn = ieee80211_sn_less(sn, nssn) ? sn : nssn;
|
||||
|
||||
iwl_mvm_release_frames(mvm, sta, napi, buffer, min_sn);
|
||||
|
@ -555,7 +555,7 @@ static int iwl_mvm_lmac_scan_abort(struct iwl_mvm *mvm)
|
||||
struct iwl_host_cmd cmd = {
|
||||
.id = SCAN_OFFLOAD_ABORT_CMD,
|
||||
};
|
||||
u32 status;
|
||||
u32 status = CAN_ABORT_STATUS;
|
||||
|
||||
ret = iwl_mvm_send_cmd_status(mvm, &cmd, &status);
|
||||
if (ret)
|
||||
|
@ -1285,7 +1285,7 @@ static int iwl_mvm_add_int_sta_common(struct iwl_mvm *mvm,
|
||||
{
|
||||
struct iwl_mvm_add_sta_cmd cmd;
|
||||
int ret;
|
||||
u32 status;
|
||||
u32 status = ADD_STA_SUCCESS;
|
||||
|
||||
lockdep_assert_held(&mvm->mutex);
|
||||
|
||||
@ -2386,8 +2386,10 @@ int iwl_mvm_sta_tx_agg_start(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
|
||||
if (WARN_ON_ONCE(tid >= IWL_MAX_TID_COUNT))
|
||||
return -EINVAL;
|
||||
|
||||
if (mvmsta->tid_data[tid].state != IWL_AGG_OFF) {
|
||||
IWL_ERR(mvm, "Start AGG when state is not IWL_AGG_OFF %d!\n",
|
||||
if (mvmsta->tid_data[tid].state != IWL_AGG_QUEUED &&
|
||||
mvmsta->tid_data[tid].state != IWL_AGG_OFF) {
|
||||
IWL_ERR(mvm,
|
||||
"Start AGG when state is not IWL_AGG_QUEUED or IWL_AGG_OFF %d!\n",
|
||||
mvmsta->tid_data[tid].state);
|
||||
return -ENXIO;
|
||||
}
|
||||
|
@ -281,6 +281,7 @@ struct iwl_mvm_vif;
|
||||
* These states relate to a specific RA / TID.
|
||||
*
|
||||
* @IWL_AGG_OFF: aggregation is not used
|
||||
* @IWL_AGG_QUEUED: aggregation start work has been queued
|
||||
* @IWL_AGG_STARTING: aggregation are starting (between start and oper)
|
||||
* @IWL_AGG_ON: aggregation session is up
|
||||
* @IWL_EMPTYING_HW_QUEUE_ADDBA: establishing a BA session - waiting for the
|
||||
@ -290,6 +291,7 @@ struct iwl_mvm_vif;
|
||||
*/
|
||||
enum iwl_mvm_agg_state {
|
||||
IWL_AGG_OFF = 0,
|
||||
IWL_AGG_QUEUED,
|
||||
IWL_AGG_STARTING,
|
||||
IWL_AGG_ON,
|
||||
IWL_EMPTYING_HW_QUEUE_ADDBA,
|
||||
|
@ -529,6 +529,7 @@ int iwl_mvm_ctdp_command(struct iwl_mvm *mvm, u32 op, u32 state)
|
||||
|
||||
lockdep_assert_held(&mvm->mutex);
|
||||
|
||||
status = 0;
|
||||
ret = iwl_mvm_send_cmd_pdu_status(mvm, WIDE_ID(PHY_OPS_GROUP,
|
||||
CTDP_CONFIG_CMD),
|
||||
sizeof(cmd), &cmd, &status);
|
||||
@ -630,7 +631,7 @@ static int iwl_mvm_tzone_get_temp(struct thermal_zone_device *device,
|
||||
|
||||
if (!iwl_mvm_firmware_running(mvm) ||
|
||||
mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR) {
|
||||
ret = -EIO;
|
||||
ret = -ENODATA;
|
||||
goto out;
|
||||
}
|
||||
|
||||
|
@ -564,8 +564,8 @@ static int iwl_mvm_get_ctrl_vif_queue(struct iwl_mvm *mvm,
|
||||
case NL80211_IFTYPE_AP:
|
||||
case NL80211_IFTYPE_ADHOC:
|
||||
/*
|
||||
* Handle legacy hostapd as well, where station will be added
|
||||
* only just before sending the association response.
|
||||
* Non-bufferable frames use the broadcast station, thus they
|
||||
* use the probe queue.
|
||||
* Also take care of the case where we send a deauth to a
|
||||
* station that we don't have, or similarly an association
|
||||
* response (with non-success status) for a station we can't
|
||||
@ -573,9 +573,9 @@ static int iwl_mvm_get_ctrl_vif_queue(struct iwl_mvm *mvm,
|
||||
* Also, disassociate frames might happen, particular with
|
||||
* reason 7 ("Class 3 frame received from nonassociated STA").
|
||||
*/
|
||||
if (ieee80211_is_probe_resp(fc) || ieee80211_is_auth(fc) ||
|
||||
ieee80211_is_deauth(fc) || ieee80211_is_assoc_resp(fc) ||
|
||||
ieee80211_is_disassoc(fc))
|
||||
if (ieee80211_is_mgmt(fc) &&
|
||||
(!ieee80211_is_bufferable_mmpdu(fc) ||
|
||||
ieee80211_is_deauth(fc) || ieee80211_is_disassoc(fc)))
|
||||
return mvm->probe_queue;
|
||||
if (info->hw_queue == info->control.vif->cab_queue)
|
||||
return mvmvif->cab_queue;
|
||||
|
@ -115,6 +115,8 @@ int qtnf_del_virtual_intf(struct wiphy *wiphy, struct wireless_dev *wdev)
|
||||
|
||||
vif = qtnf_netdev_get_priv(wdev->netdev);
|
||||
|
||||
qtnf_scan_done(vif->mac, true);
|
||||
|
||||
if (qtnf_cmd_send_del_intf(vif))
|
||||
pr_err("VIF%u.%u: failed to delete VIF\n", vif->mac->macid,
|
||||
vif->vifid);
|
||||
@ -294,6 +296,8 @@ static int qtnf_stop_ap(struct wiphy *wiphy, struct net_device *dev)
|
||||
struct qtnf_vif *vif = qtnf_netdev_get_priv(dev);
|
||||
int ret;
|
||||
|
||||
qtnf_scan_done(vif->mac, true);
|
||||
|
||||
ret = qtnf_cmd_send_stop_ap(vif);
|
||||
if (ret) {
|
||||
pr_err("VIF%u.%u: failed to stop AP operation in FW\n",
|
||||
@ -527,8 +531,6 @@ qtnf_del_station(struct wiphy *wiphy, struct net_device *dev,
|
||||
!qtnf_sta_list_lookup(&vif->sta_list, params->mac))
|
||||
return 0;
|
||||
|
||||
qtnf_scan_done(vif->mac, true);
|
||||
|
||||
ret = qtnf_cmd_send_del_sta(vif, params);
|
||||
if (ret)
|
||||
pr_err("VIF%u.%u: failed to delete STA %pM\n",
|
||||
@ -1009,8 +1011,9 @@ void qtnf_virtual_intf_cleanup(struct net_device *ndev)
|
||||
}
|
||||
|
||||
vif->sta_state = QTNF_STA_DISCONNECTED;
|
||||
qtnf_scan_done(mac, true);
|
||||
}
|
||||
|
||||
qtnf_scan_done(mac, true);
|
||||
}
|
||||
|
||||
void qtnf_cfg80211_vif_reset(struct qtnf_vif *vif)
|
||||
|
@ -34,6 +34,9 @@ static inline void qtnf_scan_done(struct qtnf_wmac *mac, bool aborted)
|
||||
.aborted = aborted,
|
||||
};
|
||||
|
||||
if (timer_pending(&mac->scan_timeout))
|
||||
del_timer_sync(&mac->scan_timeout);
|
||||
|
||||
mutex_lock(&mac->mac_lock);
|
||||
|
||||
if (mac->scan_req) {
|
||||
|
@ -334,8 +334,6 @@ qtnf_event_handle_scan_complete(struct qtnf_wmac *mac,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (timer_pending(&mac->scan_timeout))
|
||||
del_timer_sync(&mac->scan_timeout);
|
||||
qtnf_scan_done(mac, le32_to_cpu(status->flags) & QLINK_SCAN_ABORTED);
|
||||
|
||||
return 0;
|
||||
|
@ -661,14 +661,18 @@ static int qtnf_pcie_data_tx(struct qtnf_bus *bus, struct sk_buff *skb)
|
||||
struct qtnf_pcie_bus_priv *priv = (void *)get_bus_priv(bus);
|
||||
dma_addr_t txbd_paddr, skb_paddr;
|
||||
struct qtnf_tx_bd *txbd;
|
||||
unsigned long flags;
|
||||
int len, i;
|
||||
u32 info;
|
||||
int ret = 0;
|
||||
|
||||
spin_lock_irqsave(&priv->tx0_lock, flags);
|
||||
|
||||
if (!qtnf_tx_queue_ready(priv)) {
|
||||
if (skb->dev)
|
||||
netif_stop_queue(skb->dev);
|
||||
|
||||
spin_unlock_irqrestore(&priv->tx0_lock, flags);
|
||||
return NETDEV_TX_BUSY;
|
||||
}
|
||||
|
||||
@ -717,8 +721,10 @@ static int qtnf_pcie_data_tx(struct qtnf_bus *bus, struct sk_buff *skb)
|
||||
dev_kfree_skb_any(skb);
|
||||
}
|
||||
|
||||
qtnf_pcie_data_tx_reclaim(priv);
|
||||
priv->tx_done_count++;
|
||||
spin_unlock_irqrestore(&priv->tx0_lock, flags);
|
||||
|
||||
qtnf_pcie_data_tx_reclaim(priv);
|
||||
|
||||
return NETDEV_TX_OK;
|
||||
}
|
||||
@ -1247,6 +1253,7 @@ static int qtnf_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
strcpy(bus->fwname, QTN_PCI_PEARL_FW_NAME);
|
||||
init_completion(&bus->request_firmware_complete);
|
||||
mutex_init(&bus->bus_lock);
|
||||
spin_lock_init(&pcie_priv->tx0_lock);
|
||||
spin_lock_init(&pcie_priv->irq_lock);
|
||||
spin_lock_init(&pcie_priv->tx_reclaim_lock);
|
||||
|
||||
|
@ -34,6 +34,8 @@ struct qtnf_pcie_bus_priv {
|
||||
|
||||
/* lock for tx reclaim operations */
|
||||
spinlock_t tx_reclaim_lock;
|
||||
/* lock for tx0 operations */
|
||||
spinlock_t tx0_lock;
|
||||
u8 msi_enabled;
|
||||
int mps;
|
||||
|
||||
|
@ -1123,7 +1123,7 @@ static u8 _rtl8821ae_dbi_read(struct rtl_priv *rtlpriv, u16 addr)
|
||||
}
|
||||
if (0 == tmp) {
|
||||
read_addr = REG_DBI_RDATA + addr % 4;
|
||||
ret = rtl_read_byte(rtlpriv, read_addr);
|
||||
ret = rtl_read_word(rtlpriv, read_addr);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user